[Top][All Lists]
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [PATCH 1/2] linux-user: ppc: mark as long long aligned
From: |
malc |
Subject: |
Re: [Qemu-devel] [PATCH 1/2] linux-user: ppc: mark as long long aligned |
Date: |
Mon, 1 Oct 2012 21:27:22 +0400 (MSK) |
User-agent: |
Alpine 2.00 (LNX 1167 2008-08-23) |
On Sun, 30 Sep 2012, Alexander Graf wrote:
> The PPC32 ABI dictates that long long (64bit) parameters are pass in odd/even
> register pairs. Because unlike ARM and MIPS we start at an odd register
> number,
> we can reuse the same aligning code that ARM and MIPS use.
>
> Signed-off-by: Alexander Graf <address@hidden>
> ---
> linux-user/syscall.c | 6 +++++-
> 1 files changed, 5 insertions(+), 1 deletions(-)
>
> diff --git a/linux-user/syscall.c b/linux-user/syscall.c
> index 1a38169..8cd56f2 100644
> --- a/linux-user/syscall.c
> +++ b/linux-user/syscall.c
> @@ -587,12 +587,16 @@ extern int setfsgid(int);
> extern int setgroups(int, gid_t *);
>
> /* ARM EABI and MIPS expect 64bit types aligned even on pairs or registers */
> -#ifdef TARGET_ARM
> +#ifdef TARGET_ARM
> static inline int regpairs_aligned(void *cpu_env) {
> return ((((CPUARMState *)cpu_env)->eabi) == 1) ;
> }
> #elif defined(TARGET_MIPS)
> static inline int regpairs_aligned(void *cpu_env) { return 1; }
> +#elif defined(TARGET_PPC) && !defined(TARGET_PPC64)
> +/* PPC32 expects 64bit parameters to be passed on odd/even pairs of registers
> + which translates to the same as ARM/MIPS, because we start with r3 as
> arg1 */
This is inaccurate, PPC32 doesn't expect anything, SysV ABI for PPC32,
which linux uses, does. This is linux-user so SysV ABI is a given but
still i'd reword it.
> +static inline int regpairs_aligned(void *cpu_env) { return 1; }
> #else
> static inline int regpairs_aligned(void *cpu_env) { return 0; }
> #endif
>
--
mailto:address@hidden