[Qemu-devel] [PATCH 08/14] tcg-sparc: Change AREG0 in generated code to %i0.

[Richard Henderson]

We can now move the TCG variable from %g[56] to a call-preserved
windowed register.

Signed-off-by: Richard Henderson <address@hidden>
---
 tcg/sparc/tcg-target.c | 3 ++-
 tcg/sparc/tcg-target.h | 8 +-------
 2 files changed, 3 insertions(+), 8 deletions(-)

diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c
index 5acfeba..9ab5746 100644
--- a/tcg/sparc/tcg-target.c
+++ b/tcg/sparc/tcg-target.c
@@ -696,7 +696,8 @@ static void tcg_target_qemu_prologue(TCGContext *s)
 
     tcg_out32(s, JMPL | INSN_RD(TCG_REG_G0) | INSN_RS1(TCG_REG_I1) |
               INSN_RS2(TCG_REG_G0));
-    tcg_out_mov(s, TCG_TYPE_PTR, TCG_AREG0, TCG_REG_I0);
+    /* delay slot */
+    tcg_out_nop(s);
 }
 
 #if defined(CONFIG_SOFTMMU)
diff --git a/tcg/sparc/tcg-target.h b/tcg/sparc/tcg-target.h
index 99e9f57..ee154d0 100644
--- a/tcg/sparc/tcg-target.h
+++ b/tcg/sparc/tcg-target.h
@@ -130,13 +130,7 @@ typedef enum {
 
 #define TCG_TARGET_HAS_GUEST_BASE
 
-#ifdef CONFIG_SOLARIS
-#define TCG_AREG0 TCG_REG_G2
-#elif HOST_LONG_BITS == 64
-#define TCG_AREG0 TCG_REG_G5
-#else
-#define TCG_AREG0 TCG_REG_G6
-#endif
+#define TCG_AREG0 TCG_REG_I0
 
 static inline void flush_icache_range(tcg_target_ulong start,
                                       tcg_target_ulong stop)
-- 
1.7.11.4