[Top][All Lists]
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH 5/8] tcg: Implement concat*_i64 with deposit_i64
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 5/8] tcg: Implement concat*_i64 with deposit_i64 |
Date: |
Fri, 21 Sep 2012 17:18:13 -0700 |
For tcg_gen_concat_i32_i64 we only use deposit if the host supports it.
For tcg_gen_concat32_i64 even if the host does not, as we get identical
code before and after.
Note that this relies on the ANDI -> EXTU patch for the identity claim.
Signed-off-by: Richard Henderson <address@hidden>
---
tcg/tcg-op.h | 60 ++++++++++++++++++++++++++++++------------------------------
1 file changed, 30 insertions(+), 30 deletions(-)
diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h
index bcfb60b..d2fb283 100644
--- a/tcg/tcg-op.h
+++ b/tcg/tcg-op.h
@@ -1809,36 +1809,6 @@ static inline void tcg_gen_discard_i64(TCGv_i64 arg)
#endif
}
-static inline void tcg_gen_concat_i32_i64(TCGv_i64 dest, TCGv_i32 low,
TCGv_i32 high)
-{
-#if TCG_TARGET_REG_BITS == 32
- tcg_gen_mov_i32(TCGV_LOW(dest), low);
- tcg_gen_mov_i32(TCGV_HIGH(dest), high);
-#else
- TCGv_i64 tmp = tcg_temp_new_i64();
- /* This extension is only needed for type correctness.
- We may be able to do better given target specific information. */
- tcg_gen_extu_i32_i64(tmp, high);
- tcg_gen_shli_i64(tmp, tmp, 32);
- tcg_gen_extu_i32_i64(dest, low);
- tcg_gen_or_i64(dest, dest, tmp);
- tcg_temp_free_i64(tmp);
-#endif
-}
-
-static inline void tcg_gen_concat32_i64(TCGv_i64 dest, TCGv_i64 low, TCGv_i64
high)
-{
-#if TCG_TARGET_REG_BITS == 32
- tcg_gen_concat_i32_i64(dest, TCGV_LOW(low), TCGV_LOW(high));
-#else
- TCGv_i64 tmp = tcg_temp_new_i64();
- tcg_gen_ext32u_i64(dest, low);
- tcg_gen_shli_i64(tmp, high, 32);
- tcg_gen_or_i64(dest, dest, tmp);
- tcg_temp_free_i64(tmp);
-#endif
-}
-
static inline void tcg_gen_andc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
{
if (TCG_TARGET_HAS_andc_i32) {
@@ -2181,6 +2151,36 @@ static inline void tcg_gen_deposit_i64(TCGv_i64 ret,
TCGv_i64 arg1,
tcg_temp_free_i64(t1);
}
+static inline void tcg_gen_concat_i32_i64(TCGv_i64 dest, TCGv_i32 low,
+ TCGv_i32 high)
+{
+#if TCG_TARGET_REG_BITS == 32
+ tcg_gen_mov_i32(TCGV_LOW(dest), low);
+ tcg_gen_mov_i32(TCGV_HIGH(dest), high);
+#else
+ TCGv_i64 tmp = tcg_temp_new_i64();
+ /* These extensions are only needed for type correctness.
+ We may be able to do better given target specific information. */
+ tcg_gen_extu_i32_i64(tmp, high);
+ tcg_gen_extu_i32_i64(dest, low);
+ /* If deposit is available, use it. Otherwise use the extra
+ knowledge that we have of the zero-extensions above. */
+ if (TCG_TARGET_HAS_deposit_i64 && TCG_TARGET_deposit_i64_valid(32, 32)) {
+ tcg_gen_deposit_i64(dest, dest, tmp, 32, 32);
+ } else {
+ tcg_gen_shli_i64(tmp, tmp, 32);
+ tcg_gen_or_i64(dest, dest, tmp);
+ }
+ tcg_temp_free_i64(tmp);
+#endif
+}
+
+static inline void tcg_gen_concat32_i64(TCGv_i64 dest, TCGv_i64 low,
+ TCGv_i64 high)
+{
+ tcg_gen_deposit_i64(dest, low, high, 32, 32);
+}
+
static inline void tcg_gen_movcond_i32(TCGCond cond, TCGv_i32 ret,
TCGv_i32 c1, TCGv_i32 c2,
TCGv_i32 v1, TCGv_i32 v2)
--
1.7.11.4
- [Qemu-devel] [PATCH 0/8] Misc tcg improvements, Richard Henderson, 2012/09/21
- [Qemu-devel] [PATCH 1/8] tcg: Adjust descriptions of *cond opcodes, Richard Henderson, 2012/09/21
- [Qemu-devel] [PATCH 2/8] tcg: Emit ANDI as EXTU for appropriate constants, Richard Henderson, 2012/09/21
- [Qemu-devel] [PATCH 3/8] tcg: Optimize initial inputs for ori_i64, Richard Henderson, 2012/09/21
- [Qemu-devel] [PATCH 4/8] tcg: Emit XORI as NOT for appropriate constants, Richard Henderson, 2012/09/21
- [Qemu-devel] [PATCH 5/8] tcg: Implement concat*_i64 with deposit_i64,
Richard Henderson <=
- [Qemu-devel] [PATCH 6/8] tcg: Add tcg_debug_assert, Richard Henderson, 2012/09/21
- [Qemu-devel] [PATCH 7/8] tcg: Sanity check deposit inputs, Richard Henderson, 2012/09/21
- [Qemu-devel] [PATCH 8/8] tcg: Sanity check goto_tb input, Richard Henderson, 2012/09/21
- Re: [Qemu-devel] [PATCH 0/8] Misc tcg improvements, Aurelien Jarno, 2012/09/25