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[Qemu-devel] [PATCH 07/22] target-i386: convert cpuid features into prop
From: |
Igor Mammedov |
Subject: |
[Qemu-devel] [PATCH 07/22] target-i386: convert cpuid features into properties |
Date: |
Fri, 7 Sep 2012 22:54:56 +0200 |
Signed-off-by: Igor Mammedov <address@hidden>
--
v2:
* replaced mask/ffs tricks by plain 'for (bit = 0; bit < 32; bit++)'
as suggested by Eduardo Habkost
v3:
* check if property exists before adding it
* rebased on top of "i386: cpu: remove duplicate feature names"
http://www.mail-archive.com/address@hidden/msg129458.html
place ext2_feature_name for AMD case into setter, so that not to
clutter x86_cpu_realize() with property specific code.
fix for convert cpuid features
---
target-i386/cpu.c | 124 +++++++++++++++++++++++++++++++++++++++++++++++++-----
1 file changed, 114 insertions(+), 10 deletions(-)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index cac9024..ae3bc9d 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -833,6 +833,114 @@ static int check_features_against_host(x86_def_t
*guest_def)
return rv;
}
+static bool is_feature_set(const char *name, const uint32_t featbitmap,
+ const char **featureset)
+{
+ uint32_t bit;
+
+ for (bit = 0; bit < 32; ++bit) {
+ if (featureset[bit] && !altcmp(name, NULL, featureset[bit])) {
+ if (featbitmap & (1 << bit)) {
+ return true;
+ }
+ }
+ }
+ return false;
+}
+
+static void x86_cpuid_get_feature(Object *obj, Visitor *v, void *opaque,
+ const char *name, Error **errp)
+{
+ X86CPU *cpu = X86_CPU(obj);
+ CPUX86State *env = &cpu->env;
+ bool value = true;
+
+ if (!is_feature_set(name, env->cpuid_features, feature_name) &&
+ !is_feature_set(name, env->cpuid_ext_features, ext_feature_name) &&
+ !is_feature_set(name, env->cpuid_ext2_features, ext2_feature_name) &&
+ !is_feature_set(name, env->cpuid_ext3_features, ext3_feature_name) &&
+ !is_feature_set(name, env->cpuid_kvm_features, kvm_feature_name) &&
+ !is_feature_set(name, env->cpuid_svm_features, svm_feature_name)) {
+ value = false;
+ }
+
+ visit_type_bool(v, &value, name, errp);
+}
+
+static void x86_cpuid_set_feature(Object *obj, Visitor *v, void *opaque,
+ const char *name, Error **errp)
+{
+ X86CPU *cpu = X86_CPU(obj);
+ CPUX86State *env = &cpu->env;
+ uint32_t mask = 0;
+ uint32_t *dst_features;
+ bool value;
+
+ visit_type_bool(v, &value, name, errp);
+ if (error_is_set(errp)) {
+ return;
+ }
+
+ if (lookup_feature(&mask, name, NULL, feature_name)) {
+ dst_features = &env->cpuid_features;
+ } else if (lookup_feature(&mask, name, NULL, ext_feature_name)) {
+ dst_features = &env->cpuid_ext_features;
+ } else if (lookup_feature(&mask, name, NULL, ext2_feature_name)) {
+ dst_features = &env->cpuid_ext2_features;
+ } else if (lookup_feature(&mask, name, NULL, ext3_feature_name)) {
+ dst_features = &env->cpuid_ext3_features;
+ } else if (lookup_feature(&mask, name, NULL, kvm_feature_name)) {
+ dst_features = &env->cpuid_kvm_features;
+ } else if (lookup_feature(&mask, name, NULL, svm_feature_name)) {
+ dst_features = &env->cpuid_svm_features;
+ } else {
+ error_set(errp, QERR_PROPERTY_NOT_FOUND, "", name);
+ return;
+ }
+
+ if (value) {
+ *dst_features |= mask;
+ } else {
+ *dst_features &= ~mask;
+ }
+
+ /* On AMD CPUs, some CPUID[8000_0001].EDX bits must match the bits on
+ * CPUID[1].EDX.
+ */
+ if (dst_features == &env->cpuid_features &&
+ env->cpuid_vendor1 == CPUID_VENDOR_AMD_1 &&
+ env->cpuid_vendor2 == CPUID_VENDOR_AMD_2 &&
+ env->cpuid_vendor3 == CPUID_VENDOR_AMD_3) {
+ env->cpuid_ext2_features &= ~CPUID_EXT2_AMD_ALIASES;
+ env->cpuid_ext2_features |= *dst_features & CPUID_EXT2_AMD_ALIASES;
+ }
+}
+
+static void x86_register_cpuid_properties(Object *obj, const char **featureset)
+{
+ uint32_t bit;
+
+ for (bit = 0; bit < 32; ++bit) {
+ if (featureset[bit]) {
+ char *feature_name, *save_ptr;
+ char buf[32];
+ if (strlen(featureset[bit]) > sizeof(buf) - 1) {
+ abort();
+ }
+ pstrcpy(buf, sizeof(buf), featureset[bit]);
+ feature_name = strtok_r(buf, "|", &save_ptr);
+ while (feature_name) {
+ if (!object_property_find(obj, feature_name, NULL)) {
+ object_property_add(obj, feature_name, "bool",
+ x86_cpuid_get_feature,
+ x86_cpuid_set_feature, NULL, NULL, NULL);
+ }
+ feature_name = strtok_r(NULL, "|", &save_ptr);
+ }
+ }
+ }
+}
+
static void x86_cpuid_version_get_family(Object *obj, Visitor *v, void *opaque,
const char *name, Error **errp)
{
@@ -1126,16 +1234,6 @@ static void cpudef_2_x86_cpu(X86CPU *cpu, x86_def_t
*def, Error **errp)
env->cpuid_ext4_features = def->ext4_features;
env->cpuid_7_0_ebx = def->cpuid_7_0_ebx_features;
env->cpuid_xlevel2 = def->xlevel2;
-
- /* On AMD CPUs, some CPUID[8000_0001].EDX bits must match the bits on
- * CPUID[1].EDX.
- */
- if (env->cpuid_vendor1 == CPUID_VENDOR_AMD_1 &&
- env->cpuid_vendor2 == CPUID_VENDOR_AMD_2 &&
- env->cpuid_vendor3 == CPUID_VENDOR_AMD_3) {
- env->cpuid_ext2_features &= ~CPUID_EXT2_AMD_ALIASES;
- env->cpuid_ext2_features |= (def->features & CPUID_EXT2_AMD_ALIASES);
- }
}
static int cpu_x86_find_by_name(X86CPU *cpu, x86_def_t *x86_cpu_def,
@@ -1936,6 +2034,12 @@ static void x86_cpu_initfn(Object *obj)
object_property_add(obj, "tsc-frequency", "int",
x86_cpuid_get_tsc_freq,
x86_cpuid_set_tsc_freq, NULL, NULL, NULL);
+ x86_register_cpuid_properties(obj, feature_name);
+ x86_register_cpuid_properties(obj, ext_feature_name);
+ x86_register_cpuid_properties(obj, ext2_feature_name);
+ x86_register_cpuid_properties(obj, ext3_feature_name);
+ x86_register_cpuid_properties(obj, kvm_feature_name);
+ x86_register_cpuid_properties(obj, svm_feature_name);
env->cpuid_apic_id = env->cpu_index;
--
1.7.11.4
- Re: [Qemu-devel] [PATCH 01/22] target-i386: return Error from cpu_x86_find_by_name(), (continued)
- [Qemu-devel] [PATCH 02/22] target-i386: cpu_x86_register(): report error from property setter, Igor Mammedov, 2012/09/07
- [Qemu-devel] [PATCH 03/22] target-i386: if x86_cpu_realize() failed report error and do cleanup, Igor Mammedov, 2012/09/07
- [Qemu-devel] [PATCH 04/22] target-i386: filter out not TCG features if running without kvm at realize time, Igor Mammedov, 2012/09/07
- [Qemu-devel] [PATCH 05/22] target-i386: move out CPU features initialization in separate func, Igor Mammedov, 2012/09/07
- [Qemu-devel] [PATCH 07/22] target-i386: convert cpuid features into properties,
Igor Mammedov <=
- [Qemu-devel] [PATCH 08/22] target-i386: add stubs for hyperv_(vapic_recommended|relaxed_timing_enabled|get_spinlock_retries)(), Igor Mammedov, 2012/09/07
- [Qemu-devel] [PATCH 10/22] target-i386: convert 'hv_relaxed' feature into property, Igor Mammedov, 2012/09/07
- [Qemu-devel] [PATCH 12/22] target-i386: convert 'check' and 'enforce' features into properties, Igor Mammedov, 2012/09/07
- [Qemu-devel] [PATCH 06/22] target-i386: xlevel should be more than 0x80000000, move fixup into setter, Igor Mammedov, 2012/09/07
- [Qemu-devel] [PATCH 17/22] target-i386: replace uint32_t vendor fields by vendor string in x86_def_t, Igor Mammedov, 2012/09/07
- [Qemu-devel] [PATCH 13/22] add visitor for parsing hz[KMG] input string, Igor Mammedov, 2012/09/07