[Top][All Lists]
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH 68/72] PPC: BookE: Make ivpr selectable by CPU type
From: |
Alexander Graf |
Subject: |
[Qemu-devel] [PATCH 68/72] PPC: BookE: Make ivpr selectable by CPU type |
Date: |
Sun, 24 Jun 2012 01:07:32 +0200 |
IVPR can either hold 32 or 64 bit addresses, depending on the CPU type. Let
the CPU initialization function pass in its mask itself, so we can easily
extend it.
Signed-off-by: Alexander Graf <address@hidden>
---
target-ppc/translate_init.c | 9 +++++----
1 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 57027a2..98695ab 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -2804,7 +2804,7 @@ static void init_excp_G2 (CPUPPCState *env)
#endif
}
-static void init_excp_e200 (CPUPPCState *env)
+static void init_excp_e200(CPUPPCState *env, target_ulong ivpr_mask)
{
#if !defined(CONFIG_USER_ONLY)
env->excp_vectors[POWERPC_EXCP_RESET] = 0x00000FFC;
@@ -2829,7 +2829,7 @@ static void init_excp_e200 (CPUPPCState *env)
env->excp_vectors[POWERPC_EXCP_EFPRI] = 0x00000000;
env->hreset_excp_prefix = 0x00000000UL;
env->ivor_mask = 0x0000FFF7UL;
- env->ivpr_mask = 0xFFFF0000UL;
+ env->ivpr_mask = ivpr_mask;
/* Hardware reset vector */
env->hreset_vector = 0xFFFFFFFCUL;
#endif
@@ -4307,7 +4307,7 @@ static void init_proc_e200 (CPUPPCState *env)
env->id_tlbs = 0;
env->tlb_type = TLB_EMB;
#endif
- init_excp_e200(env);
+ init_excp_e200(env, 0xFFFF0000UL);
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* XXX: TODO: allocate internal IRQ controller */
@@ -4434,6 +4434,7 @@ static void init_proc_e500 (CPUPPCState *env, int version)
{
uint32_t tlbncfg[2];
uint64_t ivor_mask = 0x0000000F0000FFFFULL;
+ uint64_t ivpr_mask = 0xFFFF0000ULL;
uint32_t l1cfg0 = 0x3800 /* 8 ways */
| 0x0020; /* 32 kb */
#if !defined(CONFIG_USER_ONLY)
@@ -4575,7 +4576,7 @@ static void init_proc_e500 (CPUPPCState *env, int version)
}
#endif
- init_excp_e200(env);
+ init_excp_e200(env, ivpr_mask);
/* Allocate hardware IRQ controller */
ppce500_irq_init(env);
}
--
1.6.0.2
- [Qemu-devel] [PATCH 71/72] PPC: BookE: Support 32 and 64 bit wide MAS2, (continued)
- [Qemu-devel] [PATCH 71/72] PPC: BookE: Support 32 and 64 bit wide MAS2, Alexander Graf, 2012/06/23
- [Qemu-devel] [PATCH 59/72] PPC: e500: Extend address/size of / to 64bit, Alexander Graf, 2012/06/23
- [Qemu-devel] [PATCH 56/72] PPC: e500: Use new MPIC dt format, Alexander Graf, 2012/06/23
- [Qemu-devel] [PATCH 53/72] PPC: e500: dt: use target_phys_addr_t for ramsize, Alexander Graf, 2012/06/23
- [Qemu-devel] [PATCH 54/72] PPC: e500: enable manual loading of dtb blob, Alexander Graf, 2012/06/23
- [Qemu-devel] [PATCH 49/72] PPC: e500: dt: create pci node dynamically, Alexander Graf, 2012/06/23
- [Qemu-devel] [PATCH 51/72] dt: Add -machine dumpdtb option to dump the current dtb, Alexander Graf, 2012/06/23
- [Qemu-devel] [PATCH 55/72] Revert "dt: temporarily disable subtree creation failure check", Alexander Graf, 2012/06/23
- [Qemu-devel] [PATCH 70/72] PPC: Extract SPR dump generation into its own function, Alexander Graf, 2012/06/23
- [Qemu-devel] [PATCH 50/72] PPC: e500: dt: start with empty device tree, Alexander Graf, 2012/06/23
- [Qemu-devel] [PATCH 68/72] PPC: BookE: Make ivpr selectable by CPU type,
Alexander Graf <=
- [Qemu-devel] [PATCH 57/72] PPC: e500: Use new SOC dt format, Alexander Graf, 2012/06/23
- Re: [Qemu-devel] [PULL 00/72] ppc patch queue 2012-06-24, Blue Swirl, 2012/06/24