Re: [Qemu-devel] DMA Pointer for SSD Simulation

[jims]

A quick follow up: I realized that I didn't understand how to use
scatter/gather lists and that is why I was getting garbage output. I read
some old mailing list messages from when this was first implemented and
added the following code to ide_dma_cb:

fprintf(stderr, "\nsg SG list (size = %ld, nsg=%d)\n", s->sg.size,
s->sg.nsg);
int i;
for (i=0; i<s->sg.nsg; i++)
{
        fprintf(stderr, "%d (base = %ld, len = %ld)\n", i, s->sg.sg[i].base,
s->sg.sg[i].len);
}

I'm now getting reasonable output for the most cases when s->nsector == 0
(which is when we actually send the call back to PTLSim).

Here is a typical output:

io_buffer_size = 13312

SG list (size = 13312, nsg=4)
0 (base = 231381680, len = 4096)
1 (base = 547137536, len = 4096)
2 (base = 547141632, len = 4096)
3 (base = 547145728, len = 1024)


I'm still seeing some things that don't look valid though.

Here is one that targets address 0 (not sure if this is allowed or not):

sg SG list (size = 1024, nsg=1)
0 (base = 0, len = 1024)

And here is one that looks almost correct except for one garbage entry:

SG list (size = 69632, nsg=17)
0 (base = 139836550876824, len = 139836550876824)
1 (base = 547180544, len = 4096)
2 (base = 547184640, len = 4096)
3 (base = 547188736, len = 4096)
4 (base = 547192832, len = 4096)
5 (base = 547196928, len = 4096)
6 (base = 547201024, len = 4096)
7 (base = 547205120, len = 4096)
8 (base = 547209216, len = 4096)
9 (base = 547213312, len = 4096)
10 (base = 547217408, len = 4096)
11 (base = 547221504, len = 4096)
12 (base = 547225600, len = 4096)
13 (base = 547229696, len = 4096)
14 (base = 547233792, len = 4096)
15 (base = 547237888, len = 4096)
16 (base = 547241984, len = 4096)

As you can see, it appears the 0th entry should have len=4096 (because
that would result in a sum of 69632). But both the address and length are
wrong. Any ideas as to why?


Thanks,

Jim Stevens
University of Maryland, College Park



> I am working on an SSD simulation to plug into the MARSSx86 simulation
> environment (http://marss86.org/~marss86/index.php/Home). MARSSx86 uses
> QEMU as an emulation for an x86_64 system and PTLSim for timing the
> pipeline. My lab has further extended this system to use our DRAMSim2
> simulator to simulate the main memory
> (https://wiki.umd.edu/DRAMSim2/index.php?title=Main_Page).
>
> I have integrated our SSD simulator into marss. The SSD simulator models
> the host interface and the SSD internals. This works by delaying the IRQ
> for the IDE (in qemu/hw/ide/core.c:ide_dma_cb()) based on the operation of
> the SSD model. I now want to capture the timing of the DMA for the SSD as
> it would happen in a real system. To do this, I'd like to send read
> transactions to DRAMSim2 before a write operation to the SSD and write
> transactions to DRAMSim2 after a read operation to the SSD. The reason I'm
> emailing is that I've made a few assumptions about how the IDE code in
> QEMU works and I'd like to confirm that I'm doing things correctly.
>
> One problem I'm having is that I cannot figure out what the actual pointer
> is for the DMA operation in the guest physical memory. I have printed out
> the s->sg.sg->base and  s->sg.sg->len in ide_dma_cb(), but it seems to be
> garbage a lot of the time. I'm getting base=0 or base as something very
> large and out of my memory bounds (e.g. 139880767148024). Sometimes it
> does seem to be a valid location in memory though. Why is this sometimes
> seemingly invalid? Or am I using the wrong variable to the DMA pointer
> into the guest physical memory?
>
> Also, the s->sg.sg->len is often not matching the io_buffer_size. I'm not
> 100% sure if it should, but since I'm using io_buffer_size to determine
> the number of transactions to send to DRAMSim2 per IRQ (with
> io_buffer_size / 64) and the number of sectors to write to the disk per
> IRQ, I'd like to know if I'm doing things correctly or not.
>
> Lastly, I'm using the sector_num (multiplied by 512 to get a byte address)
> in ide_dma_cb() as the base address to the SSD. Is this correct?
>
> If you'd like to review the code, it is available on Github
> (https://github.com/jimstevens2001/marss.dramsim/tree/ssdsim). The disk
> access/DMA information is extracted from qemu/hw/ide/core.c and the
> interaction with our SSD model is implemented in ptlsim/sim/ptlsim.cpp.
>
>
> Thanks,
>
> Jim Stevens
> University of Maryland, College Park
>