[Top][All Lists]
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [PATCH v2 09/14] target-arm: Move feature register setu
From: |
Andreas Färber |
Subject: |
Re: [Qemu-devel] [PATCH v2 09/14] target-arm: Move feature register setup to per-CPU init fns |
Date: |
Fri, 20 Apr 2012 17:50:38 +0200 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:11.0) Gecko/20120312 Thunderbird/11.0 |
Am 14.04.2012 18:42, schrieb Peter Maydell:
> Move feature register value setup to per-CPU init functions.
>
> Signed-off-by: Peter Maydell <address@hidden>
> ---
> target-arm/cpu-qom.h | 14 ++++++++
> target-arm/cpu.c | 91
> ++++++++++++++++++++++++++++++++++++++++++++++++++
> target-arm/helper.c | 73 ++++++++--------------------------------
> 3 files changed, 119 insertions(+), 59 deletions(-)
[...]
> diff --git a/target-arm/cpu.c b/target-arm/cpu.c
> index 900bfc7..924aaed 100644
> --- a/target-arm/cpu.c
> +++ b/target-arm/cpu.c
[...]
> @@ -202,6 +257,18 @@ static void cortex_a8_initfn(Object *obj)
> cpu->mvfr1 = 0x00011100;
> cpu->ctr = 0x82048004;
> cpu->reset_sctlr = 0x00c50078;
> + cpu->id_pfr0 = 0x1031;
> + cpu->id_pfr1 = 0x11;
> + cpu->id_dfr0 = 0x400;
> + cpu->id_afr0 = 0;
> + cpu->id_mmfr0 = 0x31100003;
> + cpu->id_mmfr1 = 0x20000000;
> + cpu->id_mmfr2 = 0x01202000;
Missing cpu->id_mmfr3 = 0x11;
> + cpu->id_isar0 = 0x00101111;
> + cpu->id_isar1 = 0x12112111;
> + cpu->id_isar2 = 0x21232031;
> + cpu->id_isar3 = 0x11112131;
> + cpu->id_isar4 = 0x00111142;
> }
>
> static void cortex_a9_initfn(Object *obj)
> @@ -223,6 +290,18 @@ static void cortex_a9_initfn(Object *obj)
> cpu->mvfr1 = 0x01111111;
> cpu->ctr = 0x80038003;
> cpu->reset_sctlr = 0x00c50078;
> + cpu->id_pfr0 = 0x1031;
> + cpu->id_pfr1 = 0x11;
> + cpu->id_dfr0 = 0x000;
> + cpu->id_afr0 = 0;
> + cpu->id_mmfr0 = 0x00100103;
> + cpu->id_mmfr1 = 0x20000000;
> + cpu->id_mmfr2 = 0x01230000;
Missing cpu->id_mmfr3 = 0x00002111;
> + cpu->id_isar0 = 0x00101111;
> + cpu->id_isar1 = 0x13112111;
> + cpu->id_isar2 = 0x21232041;
> + cpu->id_isar3 = 0x11112131;
> + cpu->id_isar4 = 0x00111142;
> }
>
> static void cortex_a15_initfn(Object *obj)
> @@ -242,6 +321,18 @@ static void cortex_a15_initfn(Object *obj)
> cpu->mvfr1 = 0x11111111;
> cpu->ctr = 0x8444c004;
> cpu->reset_sctlr = 0x00c50078;
> + cpu->id_pfr0 = 0x00001131;
> + cpu->id_pfr1 = 0x00011011;
> + cpu->id_dfr0 = 0x02010555;
> + cpu->id_afr0 = 0x00000000;
> + cpu->id_mmfr0 = 0x10201105;
> + cpu->id_mmfr1 = 0x20000000;
> + cpu->id_mmfr2 = 0x01240000;
Missing cpu->id_mmfr3 = 0x02102211;
> + cpu->id_isar0 = 0x02101110;
> + cpu->id_isar1 = 0x13112111;
> + cpu->id_isar2 = 0x21232041;
> + cpu->id_isar3 = 0x11112131;
> + cpu->id_isar4 = 0x10011142;
> }
>
> static void ti925t_initfn(Object *obj)
Apart from the omissions looking fine, Acked-by if fixed.
Andreas
--
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
- [Qemu-devel] [PATCH v2 00/14] target-arm: Create QOM subclass per CPU implementation, Peter Maydell, 2012/04/14
- [Qemu-devel] [PATCH v2 09/14] target-arm: Move feature register setup to per-CPU init fns, Peter Maydell, 2012/04/14
- Re: [Qemu-devel] [PATCH v2 09/14] target-arm: Move feature register setup to per-CPU init fns,
Andreas Färber <=
- [Qemu-devel] [PATCH v2 14/14] target-arm: Move A9 config_base_address reset value to ARMCPU, Peter Maydell, 2012/04/14
- [Qemu-devel] [PATCH v2 10/14] target-arm: Move OMAP cp15_i_{max, min} reset to cpu_state_reset, Peter Maydell, 2012/04/14
- [Qemu-devel] [PATCH v2 07/14] target-arm: Drop JTAG_ID documentation, Peter Maydell, 2012/04/14
- [Qemu-devel] [PATCH v2 12/14] target-arm: Drop cpu_reset_model_id(), Peter Maydell, 2012/04/14