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[Qemu-devel] [PATCH 1/4] softmmu: move target alignment definition to co
From: |
Blue Swirl |
Subject: |
[Qemu-devel] [PATCH 1/4] softmmu: move target alignment definition to configure stage |
Date: |
Mon, 9 Apr 2012 19:46:15 +0000 |
Signed-off-by: Blue Swirl <address@hidden>
---
configure | 11 +++++++++++
exec.c | 6 ++++++
softmmu_template.h | 12 ++++++------
target-alpha/mem_helper.c | 1 -
target-mips/op_helper.c | 1 -
target-sparc/ldst_helper.c | 1 -
target-xtensa/op_helper.c | 1 -
7 files changed, 23 insertions(+), 10 deletions(-)
diff --git a/configure b/configure
index 671b232..d342ea3 100755
--- a/configure
+++ b/configure
@@ -3483,6 +3483,7 @@ target_int_alignment=4
target_long_alignment=4
target_llong_alignment=8
target_libs_softmmu=
+target_aligned_only=
TARGET_ARCH="$target_arch2"
TARGET_BASE_ARCH=""
@@ -3500,6 +3501,7 @@ case "$target_arch2" in
alpha)
target_phys_bits=64
target_long_alignment=8
+ target_aligned_only="yes"
target_nptl="yes"
;;
arm|armeb)
@@ -3539,12 +3541,14 @@ case "$target_arch2" in
echo "TARGET_ABI_MIPSO32=y" >> $config_target_mak
target_nptl="yes"
target_phys_bits=64
+ target_aligned_only="yes"
;;
mipsn32|mipsn32el)
TARGET_ARCH=mipsn32
TARGET_BASE_ARCH=mips
echo "TARGET_ABI_MIPSN32=y" >> $config_target_mak
target_phys_bits=64
+ target_aligned_only="yes"
;;
mips64|mips64el)
TARGET_ARCH=mips64
@@ -3552,6 +3556,7 @@ case "$target_arch2" in
echo "TARGET_ABI_MIPSN64=y" >> $config_target_mak
target_phys_bits=64
target_long_alignment=8
+ target_aligned_only="yes"
;;
ppc)
gdb_xml_files="power-core.xml power-fpu.xml power-altivec.xml
power-spe.xml"
@@ -3592,11 +3597,13 @@ case "$target_arch2" in
;;
sparc)
target_phys_bits=64
+ target_aligned_only="yes"
;;
sparc64)
TARGET_BASE_ARCH=sparc
target_phys_bits=64
target_long_alignment=8
+ target_aligned_only="yes"
;;
sparc32plus)
TARGET_ARCH=sparc64
@@ -3616,6 +3623,7 @@ case "$target_arch2" in
xtensa|xtensaeb)
TARGET_ARCH=xtensa
target_phys_bits=32
+ target_aligned_only="yes"
;;
*)
echo "Unsupported target CPU"
@@ -3633,6 +3641,9 @@ echo
"TARGET_SHORT_ALIGNMENT=$target_short_alignment" >> $config_target_mak
echo "TARGET_INT_ALIGNMENT=$target_int_alignment" >> $config_target_mak
echo "TARGET_LONG_ALIGNMENT=$target_long_alignment" >> $config_target_mak
echo "TARGET_LLONG_ALIGNMENT=$target_llong_alignment" >> $config_target_mak
+if test "$target_aligned_only" = "yes" ; then
+ echo "TARGET_ALIGNED_ONLY=y" >> $config_target_mak
+fi
echo "TARGET_ARCH=$TARGET_ARCH" >> $config_target_mak
target_arch_name="`echo $TARGET_ARCH | LC_ALL=C tr '[a-z]' '[A-Z]'`"
echo "TARGET_$target_arch_name=y" >> $config_target_mak
diff --git a/exec.c b/exec.c
index 03d3a6b..5d54ebd 100644
--- a/exec.c
+++ b/exec.c
@@ -4642,6 +4642,12 @@ bool virtio_is_big_endian(void)
#define env cpu_single_env
#define SOFTMMU_CODE_ACCESS
+/*
+ * ??? Ignoring alignment restrictions for code accesses can't be
+ * correct (for those architectures that care about alignment).
+ */
+#undef TARGET_ALIGNED_ONLY
+
#define SHIFT 0
#include "softmmu_template.h"
diff --git a/softmmu_template.h b/softmmu_template.h
index afcab1e..02c4218 100644
--- a/softmmu_template.h
+++ b/softmmu_template.h
@@ -132,14 +132,14 @@ glue(glue(glue(HELPER_PREFIX, ld), SUFFIX),
MMUSUFFIX)(ENV_PARAM
/* slow unaligned access (it spans two pages or IO) */
do_unaligned_access:
retaddr = GETPC();
-#ifdef ALIGNED_ONLY
+#ifdef TARGET_ALIGNED_ONLY
do_unaligned_access(ENV_VAR addr, READ_ACCESS_TYPE,
mmu_idx, retaddr);
#endif
res = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(ENV_VAR addr,
mmu_idx, retaddr);
} else {
/* unaligned/aligned access in the same page */
-#ifdef ALIGNED_ONLY
+#ifdef TARGET_ALIGNED_ONLY
if ((addr & (DATA_SIZE - 1)) != 0) {
retaddr = GETPC();
do_unaligned_access(ENV_VAR addr, READ_ACCESS_TYPE,
mmu_idx, retaddr);
@@ -151,7 +151,7 @@ glue(glue(glue(HELPER_PREFIX, ld), SUFFIX),
MMUSUFFIX)(ENV_PARAM
} else {
/* the page is not in the TLB : fill it */
retaddr = GETPC();
-#ifdef ALIGNED_ONLY
+#ifdef TARGET_ALIGNED_ONLY
if ((addr & (DATA_SIZE - 1)) != 0)
do_unaligned_access(ENV_VAR addr, READ_ACCESS_TYPE,
mmu_idx, retaddr);
#endif
@@ -277,14 +277,14 @@ void glue(glue(glue(HELPER_PREFIX, st), SUFFIX),
MMUSUFFIX)(ENV_PARAM
} else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >=
TARGET_PAGE_SIZE) {
do_unaligned_access:
retaddr = GETPC();
-#ifdef ALIGNED_ONLY
+#ifdef TARGET_ALIGNED_ONLY
do_unaligned_access(ENV_VAR addr, 1, mmu_idx, retaddr);
#endif
glue(glue(slow_st, SUFFIX), MMUSUFFIX)(ENV_VAR addr, val,
mmu_idx, retaddr);
} else {
/* aligned/unaligned access in the same page */
-#ifdef ALIGNED_ONLY
+#ifdef TARGET_ALIGNED_ONLY
if ((addr & (DATA_SIZE - 1)) != 0) {
retaddr = GETPC();
do_unaligned_access(ENV_VAR addr, 1, mmu_idx, retaddr);
@@ -296,7 +296,7 @@ void glue(glue(glue(HELPER_PREFIX, st), SUFFIX),
MMUSUFFIX)(ENV_PARAM
} else {
/* the page is not in the TLB : fill it */
retaddr = GETPC();
-#ifdef ALIGNED_ONLY
+#ifdef TARGET_ALIGNED_ONLY
if ((addr & (DATA_SIZE - 1)) != 0)
do_unaligned_access(ENV_VAR addr, 1, mmu_idx, retaddr);
#endif
diff --git a/target-alpha/mem_helper.c b/target-alpha/mem_helper.c
index dd5ca49..53b5a58 100644
--- a/target-alpha/mem_helper.c
+++ b/target-alpha/mem_helper.c
@@ -118,7 +118,6 @@ void cpu_unassigned_access(CPUAlphaState *env,
target_phys_addr_t addr,
#include "softmmu_exec.h"
#define MMUSUFFIX _mmu
-#define ALIGNED_ONLY
#define SHIFT 0
#include "softmmu_template.h"
diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c
index ce01225..a28da4a 100644
--- a/target-mips/op_helper.c
+++ b/target-mips/op_helper.c
@@ -2296,7 +2296,6 @@ static void QEMU_NORETURN
do_unaligned_access(target_ulong addr, int is_write,
int is_user, void *retaddr);
#define MMUSUFFIX _mmu
-#define ALIGNED_ONLY
#define SHIFT 0
#include "softmmu_template.h"
diff --git a/target-sparc/ldst_helper.c b/target-sparc/ldst_helper.c
index 1418205..8a48116 100644
--- a/target-sparc/ldst_helper.c
+++ b/target-sparc/ldst_helper.c
@@ -67,7 +67,6 @@
#if !defined(CONFIG_USER_ONLY)
#include "softmmu_exec.h"
#define MMUSUFFIX _mmu
-#define ALIGNED_ONLY
#define SHIFT 0
#include "softmmu_template.h"
diff --git a/target-xtensa/op_helper.c b/target-xtensa/op_helper.c
index cdef0db..08d2d59 100644
--- a/target-xtensa/op_helper.c
+++ b/target-xtensa/op_helper.c
@@ -33,7 +33,6 @@
static void do_unaligned_access(target_ulong addr, int is_write, int is_user,
void *retaddr);
-#define ALIGNED_ONLY
#define MMUSUFFIX _mmu
#define SHIFT 0
--
1.7.10
0001-softmmu-move-target-alignment-definition-to-configur.patch
Description: Text Data
- [Qemu-devel] [PATCH 1/4] softmmu: move target alignment definition to configure stage,
Blue Swirl <=