[Top][All Lists]
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [PULL 0/4] target-xtensa queue
From: |
Blue Swirl |
Subject: |
Re: [Qemu-devel] [PULL 0/4] target-xtensa queue |
Date: |
Sat, 7 Apr 2012 11:12:04 +0000 |
On Thu, Apr 5, 2012 at 22:46, Max Filippov <address@hidden> wrote:
> The following changes since commit 8f8d364f2447e58768132fc10f48a67af371ee38:
>
> Merge branch 's390-for-upstream' of git://repo.or.cz/qemu/agraf (2012-04-04
> 20:45:03 +0000)
>
> are available in the git repository at:
>
> git://jcmvbkbc.spb.ru/dumb/qemu-xtensa.git xtensa
>
> Lluís Vilanova (1):
> target-xtensa: Move helpers.h to helper.h
>
> Max Filippov (3):
> target-xtensa: improve unit tests debugging
> target-xtensa: add test for LEND invalidation
> target-xtensa: fix tb invalidation for IBREAK and LOOP
This change:
--- a/exec-all.h
+++ b/exec-all.h
@@ -96,6 +96,7 @@ void QEMU_NORETURN cpu_loop_exit(CPUArchState *env1);
int page_unprotect(target_ulong address, unsigned long pc, void *puc);
void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end,
int is_cpu_write_access);
+void tb_invalidate_phys_addr(target_phys_addr_t addr);
void tlb_flush_page(CPUArchState *env, target_ulong addr);
void tlb_flush(CPUArchState *env, int flush_global);
#if !defined(CONFIG_USER_ONLY)
would break user emulators:
CC i386-linux-user/vm86.o
In file included from /src/qemu/target-i386/cpu.h:1038,
from /src/qemu/linux-user/qemu.h:8,
from /src/qemu/linux-user/vm86.c:27:
/src/qemu/exec-all.h:99: error: expected ')' before 'addr'
>
> exec-all.h | 1 +
> exec.c | 9 ++++++---
> target-xtensa/{helpers.h => helper.h} | 0
> target-xtensa/op_helper.c | 31 +++++++++++++++++++------------
> target-xtensa/translate.c | 6 +++---
> tests/tcg/xtensa/Makefile | 3 +++
> tests/tcg/xtensa/macros.inc | 17 +++++++++++++++++
> tests/tcg/xtensa/test_loop.S | 25 +++++++++++++++++++++++++
> xtensa-semi.c | 2 +-
> 9 files changed, 75 insertions(+), 19 deletions(-)
> rename target-xtensa/{helpers.h => helper.h} (100%)