[Qemu-devel] [PATCH 1/6] arm: move neon_tbl to neon_helper.c

[Blue Swirl]

Add an explicit CPUARMState parameter instead of relying on AREG0
and move neon_tbl to neon_helper.c.

Signed-off-by: Blue Swirl <address@hidden>
---
 target-arm/helper.h      |    2 +-
 target-arm/neon_helper.c |   22 ++++++++++++++++++++++
 target-arm/op_helper.c   |   22 ----------------------
 target-arm/translate.c   |    4 ++--
 4 files changed, 25 insertions(+), 25 deletions(-)

diff --git a/target-arm/helper.h b/target-arm/helper.h
index 16dd5fc..40529eb 100644
--- a/target-arm/helper.h
+++ b/target-arm/helper.h
@@ -141,7 +141,7 @@ DEF_HELPER_2(recpe_f32, f32, f32, env)
 DEF_HELPER_2(rsqrte_f32, f32, f32, env)
 DEF_HELPER_2(recpe_u32, i32, i32, env)
 DEF_HELPER_2(rsqrte_u32, i32, i32, env)
-DEF_HELPER_4(neon_tbl, i32, i32, i32, i32, i32)
+DEF_HELPER_5(neon_tbl, i32, env, i32, i32, i32, i32)

 DEF_HELPER_2(add_cc, i32, i32, i32)
 DEF_HELPER_2(adc_cc, i32, i32, i32)
diff --git a/target-arm/neon_helper.c b/target-arm/neon_helper.c
index 1e02d61..e3c08c2 100644
--- a/target-arm/neon_helper.c
+++ b/target-arm/neon_helper.c
@@ -2015,3 +2015,25 @@ void HELPER(neon_zip16)(CPUARMState *env,
uint32_t rd, uint32_t rm)
     env->vfp.regs[rm] = make_float64(m0);
     env->vfp.regs[rd] = make_float64(d0);
 }
+
+uint32_t HELPER(neon_tbl)(CPUARMState *env, uint32_t ireg, uint32_t def,
+                          uint32_t rn, uint32_t maxindex)
+{
+    uint32_t val;
+    uint32_t tmp;
+    int index;
+    int shift;
+    uint64_t *table;
+    table = (uint64_t *)&env->vfp.regs[rn];
+    val = 0;
+    for (shift = 0; shift < 32; shift += 8) {
+        index = (ireg >> shift) & 0xff;
+        if (index < maxindex) {
+            tmp = (table[index >> 3] >> ((index & 7) << 3)) & 0xff;
+            val |= tmp << shift;
+        } else {
+            val |= def & (0xff << shift);
+        }
+    }
+    return val;
+}
diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c
index c728432..f4c0123 100644
--- a/target-arm/op_helper.c
+++ b/target-arm/op_helper.c
@@ -31,28 +31,6 @@ static void raise_exception(int tt)
 }
 #endif

-uint32_t HELPER(neon_tbl)(uint32_t ireg, uint32_t def,
-                          uint32_t rn, uint32_t maxindex)
-{
-    uint32_t val;
-    uint32_t tmp;
-    int index;
-    int shift;
-    uint64_t *table;
-    table = (uint64_t *)&env->vfp.regs[rn];
-    val = 0;
-    for (shift = 0; shift < 32; shift += 8) {
-        index = (ireg >> shift) & 0xff;
-        if (index < maxindex) {
-            tmp = (table[index >> 3] >> ((index & 7) << 3)) & 0xff;
-            val |= tmp << shift;
-        } else {
-            val |= def & (0xff << shift);
-        }
-    }
-    return val;
-}
-
 #if !defined(CONFIG_USER_ONLY)

 #include "softmmu_exec.h"
diff --git a/target-arm/translate.c b/target-arm/translate.c
index 81725d1..72d33a9 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -6340,7 +6340,7 @@ static int disas_neon_data_insn(CPUARMState *
env, DisasContext *s, uint32_t ins
                 tmp2 = neon_load_reg(rm, 0);
                 tmp4 = tcg_const_i32(rn);
                 tmp5 = tcg_const_i32(n);
-                gen_helper_neon_tbl(tmp2, tmp2, tmp, tmp4, tmp5);
+                gen_helper_neon_tbl(tmp2, cpu_env, tmp2, tmp, tmp4, tmp5);
                 tcg_temp_free_i32(tmp);
                 if (insn & (1 << 6)) {
                     tmp = neon_load_reg(rd, 1);
@@ -6349,7 +6349,7 @@ static int disas_neon_data_insn(CPUARMState *
env, DisasContext *s, uint32_t ins
                     tcg_gen_movi_i32(tmp, 0);
                 }
                 tmp3 = neon_load_reg(rm, 1);
-                gen_helper_neon_tbl(tmp3, tmp3, tmp, tmp4, tmp5);
+                gen_helper_neon_tbl(tmp3, cpu_env, tmp3, tmp, tmp4, tmp5);
                 tcg_temp_free_i32(tmp5);
                 tcg_temp_free_i32(tmp4);
                 neon_store_reg(rd, 0, tmp2);
-- 
1.7.9

0001-arm-move-neon_tbl-to-neon_helper.c.patch
Description: Text document