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Re: [Qemu-devel] [PATCH 0/7] QOM'ify UniCore32 CPU
From: |
Blue Swirl |
Subject: |
Re: [Qemu-devel] [PATCH 0/7] QOM'ify UniCore32 CPU |
Date: |
Wed, 14 Mar 2012 20:02:30 +0000 |
On Wed, Mar 14, 2012 at 01:39, Andreas Färber <address@hidden> wrote:
> Hello,
>
> Based on qom-cpu v4 and object_class_get_list() v2, this series converts
> the UniCore32 CPU to QOM. Code-wise, target-unicore32 is pretty close to
> target-arm and faces a similar issue of CPU-dependent init code, so let's
> tackle it next.
>
> Patch 1 adds a UniCore32 CPU guest core (TCG) section to MAINTAINERS,
> so that the target-unicore32 author gets notified of patches against his code.
>
> Patch 2, based on feedback from Guan Xuetao, changes the license of most
> target-unicore32 files from GPLv2 to GPLv2+. Anthony had contributed a
> qemu_malloc() -> g_malloc() substitution that he can't relicense at this time,
> so leave that as GPLv2 and declare my following patches explicitly as GPLv2+.
Perhaps g_malloc() patch could be partially reverted and a new GPLv2+
patch applied which uses g_new()?
> Patch 2 embeds CPUUniCore32State into UniCore32CPU. My new cpu-qom.h header
> can be GPLv2+, but into cpu.c we're moving helper.c code so make it GPLv2 for
> now.
>
> Patches 4-7 move code out of the uc32_cpu_init() function and into classes.
>
> Regards,
> Andreas
>
> Cc: Guan Xue-tao <address@hidden>
> Cc: Anthony Liguori <address@hidden>
>
> Changes from former repo.or.cz qom-cpu[-wip] branch:
> * Drop duplicate .instance_init.
>
> Andreas Färber (7):
> MAINTAINERS: Add entry for UniCore32
> target-unicore32: Relicense to GPLv2+
> target-unicore32: QOM'ify CPU
> target-unicore32: Store cp0 c0_cachetype in UniCore32CPUClass
> target-unicore32: Store cp0 c1_sys in UniCore32CPUClass
> target-unicore32: Store feature flags in UniCore32CPUClass
> target-unicore32: Store ucf64 fpscr in UniCore32CPUClass
>
> MAINTAINERS | 5 ++
> Makefile.target | 1 +
> target-unicore32/cpu-qom.h | 81 ++++++++++++++++++++++++++++++
> target-unicore32/cpu.c | 112
> ++++++++++++++++++++++++++++++++++++++++++
> target-unicore32/cpu.h | 10 +---
> target-unicore32/helper.c | 62 ++---------------------
> target-unicore32/helper.h | 5 +-
> target-unicore32/op_helper.c | 5 +-
> target-unicore32/translate.c | 5 +-
> 9 files changed, 213 insertions(+), 73 deletions(-)
> create mode 100644 target-unicore32/cpu-qom.h
> create mode 100644 target-unicore32/cpu.c
>
> --
> 1.7.7
>
>
- Re: [Qemu-devel] [PATCH 1/7] MAINTAINERS: Add entry for UniCore32, (continued)
[Qemu-devel] [PATCH 5/7] target-unicore32: Store cp0 c1_sys in UniCore32CPUClass, Andreas Färber, 2012/03/13
[Qemu-devel] [PATCH 7/7] target-unicore32: Store ucf64 fpscr in UniCore32CPUClass, Andreas Färber, 2012/03/13
[Qemu-devel] [PATCH 6/7] target-unicore32: Store feature flags in UniCore32CPUClass, Andreas Färber, 2012/03/13
Re: [Qemu-devel] [PATCH 0/7] QOM'ify UniCore32 CPU, Guan Xuetao, 2012/03/14
Re: [Qemu-devel] [PATCH 0/7] QOM'ify UniCore32 CPU,
Blue Swirl <=
[Qemu-devel] [PATCH 00/12] QOM'ify SuperH CPU and SH7750 SoC, Andreas Färber, 2012/03/14
- [Qemu-devel] [PATCH 02/12] target-sh4: Do not reset features on reset, Andreas Färber, 2012/03/14
- [Qemu-devel] [PATCH 10/12] target-sh4: Make update_itlb_use() take SuperHCPU, Andreas Färber, 2012/03/14
- [Qemu-devel] [PATCH 09/12] target-sh4: Make copy_utlb_entry_itlb() take SuperHCPU, Andreas Färber, 2012/03/14
- [Qemu-devel] [PATCH 11/12] target-sh4: Make itlb_replacement() use SuperHCPU, Andreas Färber, 2012/03/14
- [Qemu-devel] [PATCH 04/12] target-sh4: Make cpu_sh4_invalidate_tlb() take SuperHCPU, Andreas Färber, 2012/03/14
- [Qemu-devel] [PATCH 08/12] target-sh4: Make get_{physical, mmu}_address() take SuperHCPU, Andreas Färber, 2012/03/14
- [Qemu-devel] [PATCH 07/12] target-sh4: Make cpu_sh4_{read, write}_mmaped_{i, u}tlb_addr() take CPU, Andreas Färber, 2012/03/14
- [Qemu-devel] [PATCH 01/12] target-sh4: QOM'ify CPU, Andreas Färber, 2012/03/14