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[Qemu-devel] [PATCH 0/7] QOM'ify UniCore32 CPU
From: |
Andreas Färber |
Subject: |
[Qemu-devel] [PATCH 0/7] QOM'ify UniCore32 CPU |
Date: |
Wed, 14 Mar 2012 02:39:51 +0100 |
Hello,
Based on qom-cpu v4 and object_class_get_list() v2, this series converts
the UniCore32 CPU to QOM. Code-wise, target-unicore32 is pretty close to
target-arm and faces a similar issue of CPU-dependent init code, so let's
tackle it next.
Patch 1 adds a UniCore32 CPU guest core (TCG) section to MAINTAINERS,
so that the target-unicore32 author gets notified of patches against his code.
Patch 2, based on feedback from Guan Xuetao, changes the license of most
target-unicore32 files from GPLv2 to GPLv2+. Anthony had contributed a
qemu_malloc() -> g_malloc() substitution that he can't relicense at this time,
so leave that as GPLv2 and declare my following patches explicitly as GPLv2+.
Patch 2 embeds CPUUniCore32State into UniCore32CPU. My new cpu-qom.h header
can be GPLv2+, but into cpu.c we're moving helper.c code so make it GPLv2 for
now.
Patches 4-7 move code out of the uc32_cpu_init() function and into classes.
Regards,
Andreas
Cc: Guan Xue-tao <address@hidden>
Cc: Anthony Liguori <address@hidden>
Changes from former repo.or.cz qom-cpu[-wip] branch:
* Drop duplicate .instance_init.
Andreas Färber (7):
MAINTAINERS: Add entry for UniCore32
target-unicore32: Relicense to GPLv2+
target-unicore32: QOM'ify CPU
target-unicore32: Store cp0 c0_cachetype in UniCore32CPUClass
target-unicore32: Store cp0 c1_sys in UniCore32CPUClass
target-unicore32: Store feature flags in UniCore32CPUClass
target-unicore32: Store ucf64 fpscr in UniCore32CPUClass
MAINTAINERS | 5 ++
Makefile.target | 1 +
target-unicore32/cpu-qom.h | 81 ++++++++++++++++++++++++++++++
target-unicore32/cpu.c | 112 ++++++++++++++++++++++++++++++++++++++++++
target-unicore32/cpu.h | 10 +---
target-unicore32/helper.c | 62 ++---------------------
target-unicore32/helper.h | 5 +-
target-unicore32/op_helper.c | 5 +-
target-unicore32/translate.c | 5 +-
9 files changed, 213 insertions(+), 73 deletions(-)
create mode 100644 target-unicore32/cpu-qom.h
create mode 100644 target-unicore32/cpu.c
--
1.7.7
- Re: [Qemu-devel] [PATCH RFC v4 02/20] target-arm: Introduce QOM ARMCPUClass, (continued)
- [Qemu-devel] [PATCH RFC v4 14/20] target-arm: Store VFP MVFR0 and MVFR1 in ARMCPUClass, Andreas Färber, 2012/03/10
- [Qemu-devel] [PATCH RFC v4 12/20] target-arm: Move the PXA270's iwMMXt reset to pxa270_reset(), Andreas Färber, 2012/03/10
- [Qemu-devel] [PATCH RFC v4 11/20] target-arm: Drop JTAG_ID documentation, Andreas Färber, 2012/03/10
- [Qemu-devel] [PATCH RFC v4 16/20] target-arm: Store CCSIDRs in ARMCPUClass, Andreas Färber, 2012/03/10
- [Qemu-devel] [PATCH RFC v4 06/20] target-arm: Move CPU feature flags out of CPUState, Andreas Färber, 2012/03/10
- Re: [Qemu-devel] [PATCH v4 0/3] Prepare QOM support for machines and CPU, Anthony Liguori, 2012/03/13
- [Qemu-devel] [PATCH 0/7] QOM'ify UniCore32 CPU,
Andreas Färber <=
- [Qemu-devel] [PATCH 4/7] target-unicore32: Store cp0 c0_cachetype in UniCore32CPUClass, Andreas Färber, 2012/03/13
- [Qemu-devel] [PATCH 2/7] target-unicore32: Relicense to GPLv2+, Andreas Färber, 2012/03/13
- Re: [Qemu-devel] [PATCH 2/7] target-unicore32: Relicense to GPLv2+, Blue Swirl, 2012/03/14
- Re: [Qemu-devel] [PATCH 2/7] target-unicore32: Relicense to GPLv2+, Stefan Weil, 2012/03/14
- Re: [Qemu-devel] [PATCH 2/7] target-unicore32: Relicense to GPLv2+, Anthony Liguori, 2012/03/14
- [Qemu-devel] [PATCH 1/7] MAINTAINERS: Add entry for UniCore32, Andreas Färber, 2012/03/13
- [Qemu-devel] [PATCH 3/7] target-unicore32: QOM'ify CPU, Andreas Färber, 2012/03/13