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[Qemu-devel] [PATCH RFC v4 18/20] target-arm: Add cpuid-{variant, revisi
From: |
Andreas Färber |
Subject: |
[Qemu-devel] [PATCH RFC v4 18/20] target-arm: Add cpuid-{variant, revision} properties to CPU |
Date: |
Sat, 10 Mar 2012 17:53:54 +0100 |
Allow to inspect and manipulate MIDR variant and revision fields.
Signed-off-by: Andreas Färber <address@hidden>
Cc: Peter Maydell <address@hidden>
---
target-arm/cpu.c | 48 ++++++++++++++++++++++++++++++++++++++++++++++++
1 files changed, 48 insertions(+), 0 deletions(-)
diff --git a/target-arm/cpu.c b/target-arm/cpu.c
index 8917a20..ad33742 100644
--- a/target-arm/cpu.c
+++ b/target-arm/cpu.c
@@ -20,6 +20,7 @@
#include "cpu-qom.h"
#include "qemu-common.h"
+#include "qapi/qapi-visit-core.h"
#if !defined(CONFIG_USER_ONLY)
#include "hw/loader.h"
#endif
@@ -173,6 +174,46 @@ static inline void unset_class_feature(ARMCPUClass *klass,
int feature)
klass->features &= ~(1u << feature);
}
+static void arm_cpuid_variant_get(Object *obj, Visitor *v, void *opaque,
+ const char *name, Error **errp)
+{
+ ARMCPU *cpu = ARM_CPU(obj);
+ int64_t value = (cpu->env.cp15.c0_cpuid >> 20) & 0xf;
+
+ visit_type_int(v, &value, name, errp);
+}
+
+static void arm_cpuid_variant_set(Object *obj, Visitor *v, void *opaque,
+ const char *name, Error **errp)
+{
+ ARMCPU *cpu = ARM_CPU(obj);
+ int64_t value;
+
+ visit_type_int(v, &value, name, errp);
+ cpu->env.cp15.c0_cpuid &= ~(0xf << 20);
+ cpu->env.cp15.c0_cpuid |= (value << 20) & 0xf;
+}
+
+static void arm_cpuid_revision_get(Object *obj, Visitor *v, void *opaque,
+ const char *name, Error **errp)
+{
+ ARMCPU *cpu = ARM_CPU(obj);
+ int64_t value = cpu->env.cp15.c0_cpuid & 0xf;
+
+ visit_type_int(v, &value, name, errp);
+}
+
+static void arm_cpuid_revision_set(Object *obj, Visitor *v, void *opaque,
+ const char *name, Error **errp)
+{
+ ARMCPU *cpu = ARM_CPU(obj);
+ int64_t value;
+
+ visit_type_int(v, &value, name, errp);
+ cpu->env.cp15.c0_cpuid &= ~0xf;
+ cpu->env.cp15.c0_cpuid |= value & 0xf;
+}
+
/* CPU models */
typedef struct ARMCPUInfo {
@@ -554,6 +595,13 @@ static void arm_cpu_initfn(Object *obj)
cpu->env.cp15.c0_cpuid = cpu_class->cp15.c0_cpuid;
cpu_reset(CPU(cpu));
+
+ object_property_add(obj, "cpuid-variant", "uint4",
+ arm_cpuid_variant_get,
+ arm_cpuid_variant_set, NULL, NULL, NULL);
+ object_property_add(obj, "cpuid-revision", "uint4",
+ arm_cpuid_revision_get,
+ arm_cpuid_revision_set, NULL, NULL, NULL);
}
static void arm_cpu_class_init(ObjectClass *klass, void *data)
--
1.7.7
- [Qemu-devel] [PATCH RFC v4 00/20] QOM'ify ARM CPU, (continued)
- [Qemu-devel] [PATCH RFC v4 13/20] target-arm: Store VFP FPSID register in ARMCPUClass, Andreas Färber, 2012/03/10
- [Qemu-devel] [PATCH RFC v4 07/20] target-arm: No longer abort on unhandled CPUIDs on reset, Andreas Färber, 2012/03/10
- [Qemu-devel] [PATCH RFC v4 10/20] target-arm: Store SCTLR in ARMCPUClass, Andreas Färber, 2012/03/10
- [Qemu-devel] [PATCH RFC v4 09/20] target-arm: Store CTR in ARMCPUClass, Andreas Färber, 2012/03/10
- [Qemu-devel] [PATCH RFC v4 18/20] target-arm: Add cpuid-{variant, revision} properties to CPU,
Andreas Färber <=
- [Qemu-devel] [PATCH RFC v4 19/20] target-arm: Simplify pxa270 CPU classes, Andreas Färber, 2012/03/10
- [Qemu-devel] [PATCH RFC v4 17/20] target-arm: Kill off cpu_reset_model_id(), Andreas Färber, 2012/03/10
- [Qemu-devel] [PATCH RFC v4 15/20] target-arm: Store CLIDR in ARMCPUClass, Andreas Färber, 2012/03/10
- [Qemu-devel] [PATCH RFC v4 20/20] hw/integratorcp: Add child property for CPU, Andreas Färber, 2012/03/10
- [Qemu-devel] [PATCH RFC v4 05/20] target-arm: Overwrite reset handler for ti925t, Andreas Färber, 2012/03/10
- [Qemu-devel] [PATCH RFC v4 04/20] target-arm: Prepare model-specific class_init function, Andreas Färber, 2012/03/10
- [Qemu-devel] [PATCH RFC v4 08/20] target-arm: Store cp15 c0_c1 and c0_c2 in ARMCPUClass, Andreas Färber, 2012/03/10