qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[Qemu-devel] Configuring QEMU to translate x86 instructions to native AR


From: Roger Tagged
Subject: [Qemu-devel] Configuring QEMU to translate x86 instructions to native ARM instructions
Date: Tue, 6 Mar 2012 00:11:09 -0500

Hello dear developers,
 
I want to use the CPU emulation component of QEMU (user mode) and I'm running into a bit of a problem that I hope you can help me with or point me to the right list. 
 
On my x86 Linux VM, I have configured QEMU with:
 
'--target-list=i386-linux-user' '--cc=/bin/arm-none-linux-gnueabi-gcc
 
I then issue the make command which cross-compiles the source code to run on an ARM CPU to emulate an x86 CPU.  When I debug the resulting ARM code, I can see that QEMU successfully turns an x86 instruction into the intermediate micro operations.  When the first call is reach, the translation ends and it then attempts to executed the micro operations as host (should be ARM) code which crashes with an illegal instruction
 
Program received signal SIGILL, Illegal instruction.
0x402a4360 in code_gen_prologue
 
When I disassemble code_gen_prologue, I expected to see ARM instructions, but I am not. 
 
(gdb) disassem code_gen_prologue
Dump of assembler code for function code_gen_prologue:
=> 0x402a4360 <+0>:   ; <UNDEFINED> instruction: 0x57565355
   0x402a4364 <+4>: ldc2l 4, cr12, [r4, #-516]! ; 0xfffffdfc
   0x402a4368 <+8>: stm r11, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, sp, lr, pc}
   0x402a436c <+12>: strgt lr, [r1], #767 ; 0x2ff
Why don't I see ARM instructions here?  Is the prologue being generated for x86 instead of ARM?  One thing that I know for certain is that the code that initializes the TCGContext tcg_target_qemu_prologue() is from the file tcg/i386/tcg-target.c and not from tcg/arm/tcg-target.c.  Is this the right?
 
Thanks in advance,
Roger

reply via email to

[Prev in Thread] Current Thread [Next in Thread]