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[Qemu-devel] [PATCH 5/6] Delete old code
From: |
Alexey Korolev |
Subject: |
[Qemu-devel] [PATCH 5/6] Delete old code |
Date: |
Thu, 1 Mar 2012 20:02:43 +1300 |
Delete old code.
Signed-off-by: Alexey Korolev <address@hidden>
---
src/pciinit.c | 212 ---------------------------------------------------------
1 files changed, 0 insertions(+), 212 deletions(-)
diff --git a/src/pciinit.c b/src/pciinit.c
index 0fba130..9c41e3c 100644
--- a/src/pciinit.c
+++ b/src/pciinit.c
@@ -617,208 +617,6 @@ static int pci_bios_map_regions(struct pci_region
*regions)
return 0;
}
-static void pci_bios_bus_reserve(struct pci_bus *bus, int type, u32 size)
-{
- u32 index;
-
- index = pci_size_to_index(size, type);
- size = pci_index_to_size(index, type);
- bus->r[type].count[index]++;
- bus->r[type].sum += size;
- if (bus->r[type].max < size)
- bus->r[type].max = size;
-}
-
-static void pci_bios_check_devices(struct pci_bus *busses)
-{
- dprintf(1, "PCI: check devices\n");
-
- // Calculate resources needed for regular (non-bus) devices.
- struct pci_device *pci;
- foreachpci(pci) {
- if (pci->class == PCI_CLASS_BRIDGE_PCI) {
- busses[pci->secondary_bus].bus_dev = pci;
- continue;
- }
- struct pci_bus *bus = &busses[pci_bdf_to_bus(pci->bdf)];
- int i;
- for (i = 0; i < PCI_NUM_REGIONS; i++) {
- u32 val, size;
- pci_bios_get_bar(pci, i, &val, &size);
- if (val == 0)
- continue;
-
- pci_bios_bus_reserve(bus, pci_addr_to_type(val), size);
- pci->bars[i].addr = val;
- pci->bars[i].size = size;
- pci->bars[i].is64 = (!(val & PCI_BASE_ADDRESS_SPACE_IO) &&
- (val & PCI_BASE_ADDRESS_MEM_TYPE_MASK)
- == PCI_BASE_ADDRESS_MEM_TYPE_64);
-
- if (pci->bars[i].is64)
- i++;
- }
- }
-
- // Propagate required bus resources to parent busses.
- int secondary_bus;
- for (secondary_bus=MaxPCIBus; secondary_bus>0; secondary_bus--) {
- struct pci_bus *s = &busses[secondary_bus];
- if (!s->bus_dev)
- continue;
- struct pci_bus *parent = &busses[pci_bdf_to_bus(s->bus_dev->bdf)];
- int type;
- for (type = 0; type < PCI_REGION_TYPE_COUNT; type++) {
- u32 limit = (type == PCI_REGION_TYPE_IO) ?
- PCI_BRIDGE_IO_MIN : PCI_BRIDGE_MEM_MIN;
- s->r[type].size = s->r[type].sum;
- if (s->r[type].size < limit)
- s->r[type].size = limit;
- s->r[type].size = pci_size_roundup(s->r[type].size);
- pci_bios_bus_reserve(parent, type, s->r[type].size);
- }
- dprintf(1, "PCI: secondary bus %d sizes: io %x, mem %x, prefmem %x\n",
- secondary_bus,
- s->r[PCI_REGION_TYPE_IO].size,
- s->r[PCI_REGION_TYPE_MEM].size,
- s->r[PCI_REGION_TYPE_PREFMEM].size);
- }
-}
-
-#define ROOT_BASE(top, sum, max) ALIGN_DOWN((top)-(sum),(max) ?: 1)
-
-// Setup region bases (given the regions' size and alignment)
-static int pci_bios_init_root_regions(struct pci_bus *bus, u32 start, u32 end)
-{
- bus->r[PCI_REGION_TYPE_IO].base = 0xc000;
-
- int reg1 = PCI_REGION_TYPE_PREFMEM, reg2 = PCI_REGION_TYPE_MEM;
- if (bus->r[reg1].sum < bus->r[reg2].sum) {
- // Swap regions so larger area is more likely to align well.
- reg1 = PCI_REGION_TYPE_MEM;
- reg2 = PCI_REGION_TYPE_PREFMEM;
- }
- bus->r[reg2].base = ROOT_BASE(end, bus->r[reg2].sum, bus->r[reg2].max);
- bus->r[reg1].base = ROOT_BASE(bus->r[reg2].base, bus->r[reg1].sum
- , bus->r[reg1].max);
- if (bus->r[reg1].base < start)
- // Memory range requested is larger than available.
- return -1;
- return 0;
-}
-
-
-/****************************************************************
- * BAR assignment
- ****************************************************************/
-
-static void pci_bios_init_bus_bases(struct pci_bus *bus)
-{
- u32 base, newbase, size;
- int type, i;
-
- for (type = 0; type < PCI_REGION_TYPE_COUNT; type++) {
- dprintf(1, " type %s max %x sum %x base %x\n", region_type_name[type],
- bus->r[type].max, bus->r[type].sum, bus->r[type].base);
- base = bus->r[type].base;
- for (i = ARRAY_SIZE(bus->r[type].count)-1; i >= 0; i--) {
- size = pci_index_to_size(i, type);
- if (!bus->r[type].count[i])
- continue;
- newbase = base + size * bus->r[type].count[i];
- dprintf(1, " size %8x: %d bar(s), %8x -> %8x\n",
- size, bus->r[type].count[i], base, newbase - 1);
- bus->r[type].bases[i] = base;
- base = newbase;
- }
- }
-}
-
-static u32 pci_bios_bus_get_addr(struct pci_bus *bus, int type, u32 size)
-{
- u32 index, addr;
-
- index = pci_size_to_index(size, type);
- addr = bus->r[type].bases[index];
- bus->r[type].bases[index] += pci_index_to_size(index, type);
- return addr;
-}
-
-#define PCI_IO_SHIFT 8
-#define PCI_MEMORY_SHIFT 16
-#define PCI_PREF_MEMORY_SHIFT 16
-
-static void pci_bios_map_devices(struct pci_bus *busses)
-{
- // Setup bases for root bus.
- dprintf(1, "PCI: init bases bus 0 (primary)\n");
- pci_bios_init_bus_bases(&busses[0]);
-
- // Map regions on each secondary bus.
- int secondary_bus;
- for (secondary_bus=1; secondary_bus<=MaxPCIBus; secondary_bus++) {
- struct pci_bus *s = &busses[secondary_bus];
- if (!s->bus_dev)
- continue;
- u16 bdf = s->bus_dev->bdf;
- struct pci_bus *parent = &busses[pci_bdf_to_bus(bdf)];
- int type;
- for (type = 0; type < PCI_REGION_TYPE_COUNT; type++) {
- s->r[type].base = pci_bios_bus_get_addr(
- parent, type, s->r[type].size);
- }
- dprintf(1, "PCI: init bases bus %d (secondary)\n", secondary_bus);
- pci_bios_init_bus_bases(s);
-
- u32 base = s->r[PCI_REGION_TYPE_IO].base;
- u32 limit = base + s->r[PCI_REGION_TYPE_IO].size - 1;
- pci_config_writeb(bdf, PCI_IO_BASE, base >> PCI_IO_SHIFT);
- pci_config_writew(bdf, PCI_IO_BASE_UPPER16, 0);
- pci_config_writeb(bdf, PCI_IO_LIMIT, limit >> PCI_IO_SHIFT);
- pci_config_writew(bdf, PCI_IO_LIMIT_UPPER16, 0);
-
- base = s->r[PCI_REGION_TYPE_MEM].base;
- limit = base + s->r[PCI_REGION_TYPE_MEM].size - 1;
- pci_config_writew(bdf, PCI_MEMORY_BASE, base >> PCI_MEMORY_SHIFT);
- pci_config_writew(bdf, PCI_MEMORY_LIMIT, limit >> PCI_MEMORY_SHIFT);
-
- base = s->r[PCI_REGION_TYPE_PREFMEM].base;
- limit = base + s->r[PCI_REGION_TYPE_PREFMEM].size - 1;
- pci_config_writew(bdf, PCI_PREF_MEMORY_BASE, base >>
PCI_PREF_MEMORY_SHIFT);
- pci_config_writew(bdf, PCI_PREF_MEMORY_LIMIT, limit >>
PCI_PREF_MEMORY_SHIFT);
- pci_config_writel(bdf, PCI_PREF_BASE_UPPER32, 0);
- pci_config_writel(bdf, PCI_PREF_LIMIT_UPPER32, 0);
- }
-
- // Map regions on each device.
- struct pci_device *pci;
- foreachpci(pci) {
- if (pci->class == PCI_CLASS_BRIDGE_PCI)
- continue;
- u16 bdf = pci->bdf;
- dprintf(1, "PCI: map device bdf=%02x:%02x.%x\n"
- , pci_bdf_to_bus(bdf), pci_bdf_to_dev(bdf),
pci_bdf_to_fn(bdf));
- struct pci_bus *bus = &busses[pci_bdf_to_bus(bdf)];
- int i;
- for (i = 0; i < PCI_NUM_REGIONS; i++) {
- if (pci->bars[i].addr == 0)
- continue;
-
- int type = pci_addr_to_type(pci->bars[i].addr);
- u32 addr = pci_bios_bus_get_addr(bus, type, pci->bars[i].size);
- dprintf(1, " bar %d, addr %x, size %x [%s]\n",
- i, addr, pci->bars[i].size, region_type_name[type]);
- pci_set_io_region_addr(pci, i, addr);
-
- if (pci->bars[i].is64) {
- i++;
- pci_set_io_region_addr(pci, i, 0);
- }
- }
- }
-}
-
-
/****************************************************************
* Main setup code
****************************************************************/
@@ -833,10 +631,6 @@ pci_setup(void)
}
dprintf(3, "pci setup\n");
-
- u32 start = BUILD_PCIMEM_START;
- u32 end = BUILD_PCIMEM_END;
-
dprintf(1, "=== PCI bus & bridge init ===\n");
if (pci_probe_host() != 0) {
return;
@@ -858,14 +652,8 @@ pci_setup(void)
free(regions);
return;
}
- pci_bios_check_devices(busses);
- if (pci_bios_init_root_regions(&busses[0], start, end) != 0) {
- panic("PCI: out of address space\n");
- }
-
dprintf(1, "=== PCI new allocation pass #2 ===\n");
pci_bios_map_regions(regions);
- pci_bios_map_devices(busses);
pci_bios_init_devices();
--
1.7.5.4
[Qemu-devel] [PATCH 5/6] Delete old code,
Alexey Korolev <=
[Qemu-devel] [PATCH 6/6] 64bit PCI range in _CRS table, Alexey Korolev, 2012/03/01
Re: [Qemu-devel] [SeaBIOS] [Seabios] [PATCH 0/6] 64bit PCI BARs allocations (take 2), Gerd Hoffmann, 2012/03/01
Re: [Qemu-devel] [Seabios] [PATCH 0/6] 64bit PCI BARs allocations (take 2), Kevin O'Connor, 2012/03/04