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Re: [Qemu-devel] [PATCH v9 5/6] arm: SoC model for Calxeda Highbank
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH v9 5/6] arm: SoC model for Calxeda Highbank |
Date: |
Thu, 12 Jan 2012 17:51:46 +0000 |
On 11 January 2012 16:31, Mark Langsdorf <address@hidden> wrote:
> + highbank_binfo.ram_size = ram_size;
> + highbank_binfo.kernel_filename = kernel_filename;
> + highbank_binfo.kernel_cmdline = kernel_cmdline;
> + highbank_binfo.initrd_filename = initrd_filename;
> + highbank_binfo.board_id = -1; /* provided by deviceTree */
> + highbank_binfo.nb_cpus = smp_cpus;
> + highbank_binfo.loader_start = 0;
> + highbank_binfo.smp_loader_start = SMP_BOOT_ADDR;
> + arm_load_kernel(env, &highbank_binfo);
So at the moment this will use address 0x10000030 as the location
that the bootloader for secondary CPUs polls to find out whether
it can release the secondary CPUs. This is right for realview
and vexpress, because it's the sysreg SYS_FLAGS (implemented in
arm_sysctl.c). Is this really the right location to poll for
Highbank?
(There's a patch in the Samsung Exynos4 patch series which
addresses this by allowing boards to specify a polling location.
So I'm wondering what that location ought to be for Highbank...)
thanks
-- PMM
- [Qemu-devel] [PATCH v9 0/6] arm: add support for Calxeda Highbank SoC, (continued)
- [Qemu-devel] [PATCH v9 0/6] arm: add support for Calxeda Highbank SoC, Mark Langsdorf, 2012/01/11
- [Qemu-devel] [PATCH v9 6/6] arm: Remove incorrect comment in arm_timer, Mark Langsdorf, 2012/01/11
- [Qemu-devel] [PATCH v9 3/6] ahci: add support for non-PCI based controllers, Mark Langsdorf, 2012/01/11
- [Qemu-devel] [PATCH v9 4/6] arm: Add dummy support for co-processor 15's secure config register, Mark Langsdorf, 2012/01/11
- [Qemu-devel] [PATCH v9 5/6] arm: SoC model for Calxeda Highbank, Mark Langsdorf, 2012/01/11
- Re: [Qemu-devel] [PATCH v9 5/6] arm: SoC model for Calxeda Highbank, Mitsyanko Igor, 2012/01/12
- Re: [Qemu-devel] [PATCH v9 5/6] arm: SoC model for Calxeda Highbank, Andreas Färber, 2012/01/12
- Re: [Qemu-devel] [PATCH v9 5/6] arm: SoC model for Calxeda Highbank, Mitsyanko Igor, 2012/01/12
- Re: [Qemu-devel] [PATCH v9 5/6] arm: SoC model for Calxeda Highbank, Peter Maydell, 2012/01/12
- Re: [Qemu-devel] [PATCH v9 5/6] arm: SoC model for Calxeda Highbank, Mitsyanko Igor, 2012/01/12
- Re: [Qemu-devel] [PATCH v9 5/6] arm: SoC model for Calxeda Highbank,
Peter Maydell <=
- [Qemu-devel] [PATCH v9 2/6] arm: make the number of GIC interrupts configurable, Mark Langsdorf, 2012/01/11
- Re: [Qemu-devel] [PATCH v9 2/6] arm: make the number of GIC interrupts configurable, Peter Maydell, 2012/01/11
- [Qemu-devel] [PATCH v9 1/6] Add xgmac ethernet model, Mark Langsdorf, 2012/01/11
- Re: [Qemu-devel] [PATCH v9 0/6] arm: add support for Calxeda Highbank SoC, Peter Maydell, 2012/01/11
- Re: [Qemu-devel] [PATCH v9 0/6] arm: add support for Calxeda Highbank SoC, Peter Maydell, 2012/01/13
- Re: [Qemu-devel] [PATCH v9 0/6] arm: add support for Calxeda Highbank SoC, Andreas Färber, 2012/01/13
- Re: [Qemu-devel] [PATCH v9 0/6] arm: add support for Calxeda Highbank SoC, Alexander Graf, 2012/01/13
- Re: [Qemu-devel] [PATCH v9 0/6] arm: add support for Calxeda Highbank SoC, Andreas Färber, 2012/01/13
- Re: [Qemu-devel] [PATCH v9 0/6] arm: add support for Calxeda Highbank SoC, Alexander Graf, 2012/01/13
[Qemu-devel] [PATCH v10 0/5] arm: add support for Calxeda Highbank, Mark Langsdorf, 2012/01/17