Re: [Qemu-devel] [PATCH] virtio-pci: Fix endianness of virtio config

[Benjamin Herrenschmidt]

On Tue, 2012-01-10 at 21:46 +0100, Alexander Graf wrote:
> On 10.01.2012, at 21:35, Andreas Färber wrote:
> 
> > Am 10.01.2012 21:30, schrieb Alexander Graf:
> >> Maybe the RTAS callbacks really want you to return stuff in little
> endian?
> > 
> > IIRC all RTAS callbacks need to be in the same bitness and
> endianness
> > (MSR LE+SB) as when instantiating RTAS from OF.
> 
> Sure, the question is how the PCI controller is wired up usually. Just
> because RTAS works in native endianness doesn't mean that endianness
> of the actual device access isn't defined differently.

Eugh... you guys don't get it :-) This is -not- about the PCI
configuration space, but the virtio configuration space which is a
slightly different thing (PCI config space works with what's there at
the moment).

So this has nothing to do with e1000 or any other emulated device like
that, but it does have to do with virtio-blk for example.

The way virtio works is that the PIO BAR is split into two parts. The
first part (header) is a set of what's basically pseudo MMIO registers
that are little endian. The second part is device-specific an is ...
guest native endian. (Yeah it's horrible, I know).

This is how it's specified in the virtio spec and how Linux expects it,
with this patch, I can boot an existing fedora 16 with virtio-blk for
example.

Cheers,
Ben.