qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[Qemu-devel] [PATCH] target-sh4: ignore ocbp and ocbwb instructions


From: Aurelien Jarno
Subject: [Qemu-devel] [PATCH] target-sh4: ignore ocbp and ocbwb instructions
Date: Sat, 7 Jan 2012 21:17:41 +0100

ocbp and ocbwb controls the writeback of a cache line to memory. They
are supposed to do nothing in case of a cache miss. Given QEMU only
partially emulate caches, it is safe to ignore these instructions.

This fixes a kernel oops when trying to access an rtl8139 NIC with
recent versions.

Signed-off-by: Aurelien Jarno <address@hidden>
---
 target-sh4/translate.c |   14 +++-----------
 1 files changed, 3 insertions(+), 11 deletions(-)

diff --git a/target-sh4/translate.c b/target-sh4/translate.c
index 2ecb236..aacf96d 100644
--- a/target-sh4/translate.c
+++ b/target-sh4/translate.c
@@ -1652,18 +1652,10 @@ static void _decode_opc(DisasContext * ctx)
        }
        return;
     case 0x00a3:               /* ocbp @Rn */
-       {
-           TCGv dummy = tcg_temp_new();
-           tcg_gen_qemu_ld32s(dummy, REG(B11_8), ctx->memidx);
-           tcg_temp_free(dummy);
-       }
-       return;
     case 0x00b3:               /* ocbwb @Rn */
-       {
-           TCGv dummy = tcg_temp_new();
-           tcg_gen_qemu_ld32s(dummy, REG(B11_8), ctx->memidx);
-           tcg_temp_free(dummy);
-       }
+        /* These instructions are supposed to do nothing in case of
+           a cache miss. Given that we only partially emulate caches
+           it is safe to simply ignore them. */
        return;
     case 0x0083:               /* pref @Rn */
        return;
-- 
1.7.7.3




reply via email to

[Prev in Thread] Current Thread [Next in Thread]