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Re: [Qemu-devel] [PATCH v3 9/9] arm: make number of a9mpcore GIC interru
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From: |
Peter Maydell |
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Subject: |
Re: [Qemu-devel] [PATCH v3 9/9] arm: make number of a9mpcore GIC interrupts configurable |
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Date: |
Tue, 27 Dec 2011 22:09:17 +0000 |
On 27 December 2011 22:04, Mark Langsdorf <address@hidden> wrote:
> On 12/27/2011 03:59 PM, Peter Maydell wrote:
>> The GIC architectural limit on number of interrupts is 1020;
>> that would (I think) imply a ~64K memory usage by the GIC,
>> which we can live with I think.
>
> I think you just said you wanted me to define the gic internal
> maximum as 1020. I just want to be sure I understood you there.
That's "we should define it as 1020 unless you or somebody else
thinks that's a terrible idea for some reason". Sorry, that was
a bit cryptic.
-- PMM
- [Qemu-devel] [PATCH v3 4/9] arm: add dummy gic security registers, (continued)
- [Qemu-devel] [PATCH v3 4/9] arm: add dummy gic security registers, Mark Langsdorf, 2011/12/27
- [Qemu-devel] [PATCH v3 1/9] arm: add missing scu registers, Mark Langsdorf, 2011/12/27
- [Qemu-devel] [PATCH v3 5/9] ahci: convert ahci_reset to use AHCIState, Mark Langsdorf, 2011/12/27
- [Qemu-devel] [PATCH v3 6/9] ahci: add support for non-PCI based controllers, Mark Langsdorf, 2011/12/27
- [Qemu-devel] [PATCH v3 9/9] arm: make number of a9mpcore GIC interrupts configurable, Mark Langsdorf, 2011/12/27
- [Qemu-devel] [PATCH v3 8/9] Add xgmac ethernet model, Mark Langsdorf, 2011/12/27