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[Qemu-devel] [PATCH v3 068/197] Patch monkey PCIDeviceInfo conversion
|
From: |
Anthony Liguori |
|
Subject: |
[Qemu-devel] [PATCH v3 068/197] Patch monkey PCIDeviceInfo conversion |
|
Date: |
Mon, 12 Dec 2011 14:19:04 -0600 |
---
hw/ac97.c | 39 +++++++++------
hw/acpi_piix4.c | 43 ++++++++++-------
hw/apb_pci.c | 54 +++++++++++++--------
hw/bonito.c | 30 +++++++-----
hw/cirrus_vga.c | 29 +++++++----
hw/dec_pci.c | 56 ++++++++++++++--------
hw/e1000.c | 43 ++++++++++-------
hw/es1370.c | 31 +++++++-----
hw/grackle_pci.c | 23 ++++++---
hw/gt64xxx.c | 23 ++++++---
hw/intel-hda.c | 45 +++++++++++-------
hw/ioh3420.c | 57 ++++++++++++----------
hw/ivshmem.c | 47 +++++++++++-------
hw/lsi53c895a.c | 31 +++++++-----
hw/ne2000.c | 35 +++++++++-----
hw/pcnet-pci.c | 39 +++++++++------
hw/ppce500_pci.c | 21 ++++++---
hw/qxl.c | 62 +++++++++++++++---------
hw/rtl8139.c | 41 ++++++++++------
hw/sh_pci.c | 19 +++++--
hw/spapr_pci.c | 15 ++++--
hw/sun4u.c | 23 ++++++---
hw/unin_pci.c | 92 +++++++++++++++++++++++------------
hw/usb-ohci.c | 37 +++++++++------
hw/versatile_pci.c | 22 ++++++---
hw/vga-pci.c | 27 ++++++----
hw/vmware_vga.c | 34 ++++++++------
hw/vt82c686.c | 120 +++++++++++++++++++++++++++++------------------
hw/wdt_i6300esb.c | 31 +++++++-----
hw/xen_platform.c | 34 ++++++++------
hw/xio3130_downstream.c | 57 ++++++++++++----------
hw/xio3130_upstream.c | 51 +++++++++++---------
32 files changed, 806 insertions(+), 505 deletions(-)
diff --git a/hw/ac97.c b/hw/ac97.c
index 0dbba3b..3f8075a 100644
--- a/hw/ac97.c
+++ b/hw/ac97.c
@@ -1341,21 +1341,30 @@ int ac97_init (PCIBus *bus)
return 0;
}
-static PCIDeviceInfo ac97_info = {
- .qdev.name = "AC97",
- .qdev.desc = "Intel 82801AA AC97 Audio",
- .qdev.size = sizeof (AC97LinkState),
- .qdev.vmsd = &vmstate_ac97,
- .init = ac97_initfn,
- .exit = ac97_exitfn,
- .vendor_id = PCI_VENDOR_ID_INTEL,
- .device_id = PCI_DEVICE_ID_INTEL_82801AA_5,
- .revision = 0x01,
- .class_id = PCI_CLASS_MULTIMEDIA_AUDIO,
- .qdev.props = (Property[]) {
- DEFINE_PROP_UINT32("use_broken_id", AC97LinkState, use_broken_id, 0),
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property ac97_properties[] = {
+ DEFINE_PROP_UINT32("use_broken_id", AC97LinkState, use_broken_id, 0),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void ac97_class_init(ObjectClass *klass, void *data)
+{
+ PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+
+ k->init = ac97_initfn;
+ k->exit = ac97_exitfn;
+ k->vendor_id = PCI_VENDOR_ID_INTEL;
+ k->device_id = PCI_DEVICE_ID_INTEL_82801AA_5;
+ k->revision = 0x01;
+ k->class_id = PCI_CLASS_MULTIMEDIA_AUDIO;
+}
+
+static DeviceInfo ac97_info = {
+ .name = "AC97",
+ .desc = "Intel 82801AA AC97 Audio",
+ .size = sizeof (AC97LinkState),
+ .vmsd = &vmstate_ac97,
+ .props = ac97_properties,
+ .class_init = ac97_class_init,
};
static void ac97_register (void)
diff --git a/hw/acpi_piix4.c b/hw/acpi_piix4.c
index ce7135b..c62f03a 100644
--- a/hw/acpi_piix4.c
+++ b/hw/acpi_piix4.c
@@ -394,23 +394,32 @@ i2c_bus *piix4_pm_init(PCIBus *bus, DeviceState **pdev,
int devfn,
return s->smb.smbus;
}
-static PCIDeviceInfo piix4_pm_info = {
- .qdev.name = "PIIX4_PM",
- .qdev.desc = "PM",
- .qdev.size = sizeof(PIIX4PMState),
- .qdev.vmsd = &vmstate_acpi,
- .qdev.no_user = 1,
- .no_hotplug = 1,
- .init = piix4_pm_initfn,
- .config_write = pm_write_config,
- .vendor_id = PCI_VENDOR_ID_INTEL,
- .device_id = PCI_DEVICE_ID_INTEL_82371AB_3,
- .revision = 0x03,
- .class_id = PCI_CLASS_BRIDGE_OTHER,
- .qdev.props = (Property[]) {
- DEFINE_PROP_UINT32("smb_io_base", PIIX4PMState, smb_io_base, 0),
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property piix4_pm_properties[] = {
+ DEFINE_PROP_UINT32("smb_io_base", PIIX4PMState, smb_io_base, 0),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void piix4_pm_class_init(ObjectClass *klass, void *data)
+{
+ PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+
+ k->no_hotplug = 1;
+ k->init = piix4_pm_initfn;
+ k->config_write = pm_write_config;
+ k->vendor_id = PCI_VENDOR_ID_INTEL;
+ k->device_id = PCI_DEVICE_ID_INTEL_82371AB_3;
+ k->revision = 0x03;
+ k->class_id = PCI_CLASS_BRIDGE_OTHER;
+}
+
+static DeviceInfo piix4_pm_info = {
+ .name = "PIIX4_PM",
+ .desc = "PM",
+ .size = sizeof(PIIX4PMState),
+ .vmsd = &vmstate_acpi,
+ .no_user = 1,
+ .props = piix4_pm_properties,
+ .class_init = piix4_pm_class_init,
};
static void piix4_pm_register(void)
diff --git a/hw/apb_pci.c b/hw/apb_pci.c
index c232946..7442e26 100644
--- a/hw/apb_pci.c
+++ b/hw/apb_pci.c
@@ -436,14 +436,21 @@ static int pbm_pci_host_init(PCIDevice *d)
return 0;
}
-static PCIDeviceInfo pbm_pci_host_info = {
- .qdev.name = "pbm",
- .qdev.size = sizeof(PCIDevice),
- .init = pbm_pci_host_init,
- .vendor_id = PCI_VENDOR_ID_SUN,
- .device_id = PCI_DEVICE_ID_SUN_SABRE,
- .class_id = PCI_CLASS_BRIDGE_HOST,
- .is_bridge = 1,
+static void pbm_pci_host_class_init(ObjectClass *klass, void *data)
+{
+ PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+
+ k->init = pbm_pci_host_init;
+ k->vendor_id = PCI_VENDOR_ID_SUN;
+ k->device_id = PCI_DEVICE_ID_SUN_SABRE;
+ k->class_id = PCI_CLASS_BRIDGE_HOST;
+ k->is_bridge = 1;
+}
+
+static DeviceInfo pbm_pci_host_info = {
+ .name = "pbm",
+ .size = sizeof(PCIDevice),
+ .class_init = pbm_pci_host_class_init,
};
static SysBusDeviceInfo pbm_host_info = {
@@ -453,18 +460,25 @@ static SysBusDeviceInfo pbm_host_info = {
.init = pci_pbm_init_device,
};
-static PCIDeviceInfo pbm_pci_bridge_info = {
- .qdev.name = "pbm-bridge",
- .qdev.size = sizeof(PCIBridge),
- .qdev.vmsd = &vmstate_pci_device,
- .qdev.reset = pci_bridge_reset,
- .init = apb_pci_bridge_initfn,
- .exit = pci_bridge_exitfn,
- .vendor_id = PCI_VENDOR_ID_SUN,
- .device_id = PCI_DEVICE_ID_SUN_SIMBA,
- .revision = 0x11,
- .config_write = pci_bridge_write_config,
- .is_bridge = 1,
+static void pbm_pci_bridge_class_init(ObjectClass *klass, void *data)
+{
+ PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+
+ k->init = apb_pci_bridge_initfn;
+ k->exit = pci_bridge_exitfn;
+ k->vendor_id = PCI_VENDOR_ID_SUN;
+ k->device_id = PCI_DEVICE_ID_SUN_SIMBA;
+ k->revision = 0x11;
+ k->config_write = pci_bridge_write_config;
+ k->is_bridge = 1;
+}
+
+static DeviceInfo pbm_pci_bridge_info = {
+ .name = "pbm-bridge",
+ .size = sizeof(PCIBridge),
+ .vmsd = &vmstate_pci_device,
+ .reset = pci_bridge_reset,
+ .class_init = pbm_pci_bridge_class_init,
};
static void pbm_register_devices(void)
diff --git a/hw/bonito.c b/hw/bonito.c
index fdb8198..a23182d 100644
--- a/hw/bonito.c
+++ b/hw/bonito.c
@@ -788,18 +788,24 @@ PCIBus *bonito_init(qemu_irq *pic)
return b;
}
-static PCIDeviceInfo bonito_info = {
- .qdev.name = "Bonito",
- .qdev.desc = "Host bridge",
- .qdev.size = sizeof(PCIBonitoState),
- .qdev.vmsd = &vmstate_bonito,
- .qdev.no_user = 1,
- .init = bonito_initfn,
- /*Bonito North Bridge, built on FPGA, VENDOR_ID/DEVICE_ID are "undefined"*/
- .vendor_id = 0xdf53,
- .device_id = 0x00d5,
- .revision = 0x01,
- .class_id = PCI_CLASS_BRIDGE_HOST,
+static void bonito_class_init(ObjectClass *klass, void *data)
+{
+ PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+
+ k->init = bonito_initfn;
+ k->vendor_id = 0xdf53;
+ k->device_id = 0x00d5;
+ k->revision = 0x01;
+ k->class_id = PCI_CLASS_BRIDGE_HOST;
+}
+
+static DeviceInfo bonito_info = {
+ .name = "Bonito",
+ .desc = "Host bridge",
+ .size = sizeof(PCIBonitoState),
+ .vmsd = &vmstate_bonito,
+ .no_user = 1,
+ .class_init = bonito_class_init,
};
static SysBusDeviceInfo bonito_pcihost_info = {
diff --git a/hw/cirrus_vga.c b/hw/cirrus_vga.c
index d6d9d70..5718ba7 100644
--- a/hw/cirrus_vga.c
+++ b/hw/cirrus_vga.c
@@ -2962,17 +2962,24 @@ DeviceState *pci_cirrus_vga_init(PCIBus *bus)
return &pci_create_simple(bus, -1, "cirrus-vga")->qdev;
}
-static PCIDeviceInfo cirrus_vga_info = {
- .qdev.name = "cirrus-vga",
- .qdev.desc = "Cirrus CLGD 54xx VGA",
- .qdev.size = sizeof(PCICirrusVGAState),
- .qdev.vmsd = &vmstate_pci_cirrus_vga,
- .no_hotplug = 1,
- .init = pci_cirrus_vga_initfn,
- .romfile = VGABIOS_CIRRUS_FILENAME,
- .vendor_id = PCI_VENDOR_ID_CIRRUS,
- .device_id = CIRRUS_ID_CLGD5446,
- .class_id = PCI_CLASS_DISPLAY_VGA,
+static void cirrus_vga_class_init(ObjectClass *klass, void *data)
+{
+ PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+
+ k->no_hotplug = 1;
+ k->init = pci_cirrus_vga_initfn;
+ k->romfile = VGABIOS_CIRRUS_FILENAME;
+ k->vendor_id = PCI_VENDOR_ID_CIRRUS;
+ k->device_id = CIRRUS_ID_CLGD5446;
+ k->class_id = PCI_CLASS_DISPLAY_VGA;
+}
+
+static DeviceInfo cirrus_vga_info = {
+ .name = "cirrus-vga",
+ .desc = "Cirrus CLGD 54xx VGA",
+ .size = sizeof(PCICirrusVGAState),
+ .vmsd = &vmstate_pci_cirrus_vga,
+ .class_init = cirrus_vga_class_init,
};
static void cirrus_vga_register(void)
diff --git a/hw/dec_pci.c b/hw/dec_pci.c
index 1aec066..0dd940c 100644
--- a/hw/dec_pci.c
+++ b/hw/dec_pci.c
@@ -50,18 +50,25 @@ static int dec_map_irq(PCIDevice *pci_dev, int irq_num)
return irq_num;
}
-static PCIDeviceInfo dec_21154_pci_bridge_info = {
- .qdev.name = "dec-21154-p2p-bridge",
- .qdev.desc = "DEC 21154 PCI-PCI bridge",
- .qdev.size = sizeof(PCIBridge),
- .qdev.vmsd = &vmstate_pci_device,
- .qdev.reset = pci_bridge_reset,
- .init = pci_bridge_initfn,
- .exit = pci_bridge_exitfn,
- .vendor_id = PCI_VENDOR_ID_DEC,
- .device_id = PCI_DEVICE_ID_DEC_21154,
- .config_write = pci_bridge_write_config,
- .is_bridge = 1,
+static void dec_21154_pci_bridge_class_init(ObjectClass *klass, void *data)
+{
+ PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+
+ k->init = pci_bridge_initfn;
+ k->exit = pci_bridge_exitfn;
+ k->vendor_id = PCI_VENDOR_ID_DEC;
+ k->device_id = PCI_DEVICE_ID_DEC_21154;
+ k->config_write = pci_bridge_write_config;
+ k->is_bridge = 1;
+}
+
+static DeviceInfo dec_21154_pci_bridge_info = {
+ .name = "dec-21154-p2p-bridge",
+ .desc = "DEC 21154 PCI-PCI bridge",
+ .size = sizeof(PCIBridge),
+ .vmsd = &vmstate_pci_device,
+ .reset = pci_bridge_reset,
+ .class_init = dec_21154_pci_bridge_class_init,
};
PCIBus *pci_dec_21154_init(PCIBus *parent_bus, int devfn)
@@ -98,15 +105,22 @@ static int dec_21154_pci_host_init(PCIDevice *d)
return 0;
}
-static PCIDeviceInfo dec_21154_pci_host_info = {
- .qdev.name = "dec-21154",
- .qdev.size = sizeof(PCIDevice),
- .init = dec_21154_pci_host_init,
- .vendor_id = PCI_VENDOR_ID_DEC,
- .device_id = PCI_DEVICE_ID_DEC_21154,
- .revision = 0x02,
- .class_id = PCI_CLASS_BRIDGE_PCI,
- .is_bridge = 1,
+static void dec_21154_pci_host_class_init(ObjectClass *klass, void *data)
+{
+ PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+
+ k->init = dec_21154_pci_host_init;
+ k->vendor_id = PCI_VENDOR_ID_DEC;
+ k->device_id = PCI_DEVICE_ID_DEC_21154;
+ k->revision = 0x02;
+ k->class_id = PCI_CLASS_BRIDGE_PCI;
+ k->is_bridge = 1;
+}
+
+static DeviceInfo dec_21154_pci_host_info = {
+ .name = "dec-21154",
+ .size = sizeof(PCIDevice),
+ .class_init = dec_21154_pci_host_class_init,
};
static void dec_register_devices(void)
diff --git a/hw/e1000.c b/hw/e1000.c
index 2f495cd..de346e6 100644
--- a/hw/e1000.c
+++ b/hw/e1000.c
@@ -1190,23 +1190,32 @@ static void qdev_e1000_reset(DeviceState *dev)
e1000_reset(d);
}
-static PCIDeviceInfo e1000_info = {
- .qdev.name = "e1000",
- .qdev.desc = "Intel Gigabit Ethernet",
- .qdev.size = sizeof(E1000State),
- .qdev.reset = qdev_e1000_reset,
- .qdev.vmsd = &vmstate_e1000,
- .init = pci_e1000_init,
- .exit = pci_e1000_uninit,
- .romfile = "pxe-e1000.rom",
- .vendor_id = PCI_VENDOR_ID_INTEL,
- .device_id = E1000_DEVID,
- .revision = 0x03,
- .class_id = PCI_CLASS_NETWORK_ETHERNET,
- .qdev.props = (Property[]) {
- DEFINE_NIC_PROPERTIES(E1000State, conf),
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property e1000_properties[] = {
+ DEFINE_NIC_PROPERTIES(E1000State, conf),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void e1000_class_init(ObjectClass *klass, void *data)
+{
+ PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+
+ k->init = pci_e1000_init;
+ k->exit = pci_e1000_uninit;
+ k->romfile = "pxe-e1000.rom";
+ k->vendor_id = PCI_VENDOR_ID_INTEL;
+ k->device_id = E1000_DEVID;
+ k->revision = 0x03;
+ k->class_id = PCI_CLASS_NETWORK_ETHERNET;
+}
+
+static DeviceInfo e1000_info = {
+ .name = "e1000",
+ .desc = "Intel Gigabit Ethernet",
+ .size = sizeof(E1000State),
+ .reset = qdev_e1000_reset,
+ .vmsd = &vmstate_e1000,
+ .props = e1000_properties,
+ .class_init = e1000_class_init,
};
static void e1000_register_devices(void)
diff --git a/hw/es1370.c b/hw/es1370.c
index 8a7ca65..32a9b8e 100644
--- a/hw/es1370.c
+++ b/hw/es1370.c
@@ -1031,18 +1031,25 @@ int es1370_init (PCIBus *bus)
return 0;
}
-static PCIDeviceInfo es1370_info = {
- .qdev.name = "ES1370",
- .qdev.desc = "ENSONIQ AudioPCI ES1370",
- .qdev.size = sizeof (ES1370State),
- .qdev.vmsd = &vmstate_es1370,
- .init = es1370_initfn,
- .exit = es1370_exitfn,
- .vendor_id = PCI_VENDOR_ID_ENSONIQ,
- .device_id = PCI_DEVICE_ID_ENSONIQ_ES1370,
- .class_id = PCI_CLASS_MULTIMEDIA_AUDIO,
- .subsystem_vendor_id = 0x4942,
- .subsystem_id = 0x4c4c,
+static void es1370_class_init(ObjectClass *klass, void *data)
+{
+ PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+
+ k->init = es1370_initfn;
+ k->exit = es1370_exitfn;
+ k->vendor_id = PCI_VENDOR_ID_ENSONIQ;
+ k->device_id = PCI_DEVICE_ID_ENSONIQ_ES1370;
+ k->class_id = PCI_CLASS_MULTIMEDIA_AUDIO;
+ k->subsystem_vendor_id = 0x4942;
+ k->subsystem_id = 0x4c4c;
+}
+
+static DeviceInfo es1370_info = {
+ .name = "ES1370",
+ .desc = "ENSONIQ AudioPCI ES1370",
+ .size = sizeof (ES1370State),
+ .vmsd = &vmstate_es1370,
+ .class_init = es1370_class_init,
};
static void es1370_register (void)
diff --git a/hw/grackle_pci.c b/hw/grackle_pci.c
index 94a608e..0d6a71c 100644
--- a/hw/grackle_pci.c
+++ b/hw/grackle_pci.c
@@ -121,14 +121,21 @@ static int grackle_pci_host_init(PCIDevice *d)
return 0;
}
-static PCIDeviceInfo grackle_pci_host_info = {
- .qdev.name = "grackle",
- .qdev.size = sizeof(PCIDevice),
- .init = grackle_pci_host_init,
- .vendor_id = PCI_VENDOR_ID_MOTOROLA,
- .device_id = PCI_DEVICE_ID_MOTOROLA_MPC106,
- .revision = 0x00,
- .class_id = PCI_CLASS_BRIDGE_HOST,
+static void grackle_pci_host_class_init(ObjectClass *klass, void *data)
+{
+ PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+
+ k->init = grackle_pci_host_init;
+ k->vendor_id = PCI_VENDOR_ID_MOTOROLA;
+ k->device_id = PCI_DEVICE_ID_MOTOROLA_MPC106;
+ k->revision = 0x00;
+ k->class_id = PCI_CLASS_BRIDGE_HOST;
+}
+
+static DeviceInfo grackle_pci_host_info = {
+ .name = "grackle",
+ .size = sizeof(PCIDevice),
+ .class_init = grackle_pci_host_class_init,
};
static void grackle_register_devices(void)
diff --git a/hw/gt64xxx.c b/hw/gt64xxx.c
index 432683a..9fc51f2 100644
--- a/hw/gt64xxx.c
+++ b/hw/gt64xxx.c
@@ -1136,14 +1136,21 @@ static int gt64120_pci_init(PCIDevice *d)
return 0;
}
-static PCIDeviceInfo gt64120_pci_info = {
- .qdev.name = "gt64120_pci",
- .qdev.size = sizeof(PCIDevice),
- .init = gt64120_pci_init,
- .vendor_id = PCI_VENDOR_ID_MARVELL,
- .device_id = PCI_DEVICE_ID_MARVELL_GT6412X,
- .revision = 0x10,
- .class_id = PCI_CLASS_BRIDGE_HOST,
+static void gt64120_pci_class_init(ObjectClass *klass, void *data)
+{
+ PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+
+ k->init = gt64120_pci_init;
+ k->vendor_id = PCI_VENDOR_ID_MARVELL;
+ k->device_id = PCI_DEVICE_ID_MARVELL_GT6412X;
+ k->revision = 0x10;
+ k->class_id = PCI_CLASS_BRIDGE_HOST;
+}
+
+static DeviceInfo gt64120_pci_info = {
+ .name = "gt64120_pci",
+ .size = sizeof(PCIDevice),
+ .class_init = gt64120_pci_class_init,
};
static void gt64120_pci_register_devices(void)
diff --git a/hw/intel-hda.c b/hw/intel-hda.c
index 97a6216..7d7b7c9 100644
--- a/hw/intel-hda.c
+++ b/hw/intel-hda.c
@@ -1246,24 +1246,33 @@ static const VMStateDescription vmstate_intel_hda = {
}
};
-static PCIDeviceInfo intel_hda_info = {
- .qdev.name = "intel-hda",
- .qdev.desc = "Intel HD Audio Controller",
- .qdev.size = sizeof(IntelHDAState),
- .qdev.vmsd = &vmstate_intel_hda,
- .qdev.reset = intel_hda_reset,
- .init = intel_hda_init,
- .exit = intel_hda_exit,
- .config_write = intel_hda_write_config,
- .vendor_id = PCI_VENDOR_ID_INTEL,
- .device_id = 0x2668,
- .revision = 1,
- .class_id = PCI_CLASS_MULTIMEDIA_HD_AUDIO,
- .qdev.props = (Property[]) {
- DEFINE_PROP_UINT32("debug", IntelHDAState, debug, 0),
- DEFINE_PROP_UINT32("msi", IntelHDAState, msi, 1),
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property intel_hda_properties[] = {
+ DEFINE_PROP_UINT32("debug", IntelHDAState, debug, 0),
+ DEFINE_PROP_UINT32("msi", IntelHDAState, msi, 1),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void intel_hda_class_init(ObjectClass *klass, void *data)
+{
+ PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+
+ k->init = intel_hda_init;
+ k->exit = intel_hda_exit;
+ k->config_write = intel_hda_write_config;
+ k->vendor_id = PCI_VENDOR_ID_INTEL;
+ k->device_id = 0x2668;
+ k->revision = 1;
+ k->class_id = PCI_CLASS_MULTIMEDIA_HD_AUDIO;
+}
+
+static DeviceInfo intel_hda_info = {
+ .name = "intel-hda",
+ .desc = "Intel HD Audio Controller",
+ .size = sizeof(IntelHDAState),
+ .vmsd = &vmstate_intel_hda,
+ .reset = intel_hda_reset,
+ .props = intel_hda_properties,
+ .class_init = intel_hda_class_init,
};
static TypeInfo hda_codec_device_type_info = {
diff --git a/hw/ioh3420.c b/hw/ioh3420.c
index 93f53dd..6cfafb3 100644
--- a/hw/ioh3420.c
+++ b/hw/ioh3420.c
@@ -201,31 +201,38 @@ static const VMStateDescription vmstate_ioh3420 = {
}
};
-static PCIDeviceInfo ioh3420_info = {
- .qdev.name = "ioh3420",
- .qdev.desc = "Intel IOH device id 3420 PCIE Root Port",
- .qdev.size = sizeof(PCIESlot),
- .qdev.reset = ioh3420_reset,
- .qdev.vmsd = &vmstate_ioh3420,
-
- .is_express = 1,
- .is_bridge = 1,
- .config_write = ioh3420_write_config,
- .init = ioh3420_initfn,
- .exit = ioh3420_exitfn,
- .vendor_id = PCI_VENDOR_ID_INTEL,
- .device_id = PCI_DEVICE_ID_IOH_EPORT,
- .revision = PCI_DEVICE_ID_IOH_REV,
-
- .qdev.props = (Property[]) {
- DEFINE_PROP_UINT8("port", PCIESlot, port.port, 0),
- DEFINE_PROP_UINT8("chassis", PCIESlot, chassis, 0),
- DEFINE_PROP_UINT16("slot", PCIESlot, slot, 0),
- DEFINE_PROP_UINT16("aer_log_max", PCIESlot,
- port.br.dev.exp.aer_log.log_max,
- PCIE_AER_LOG_MAX_DEFAULT),
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property ioh3420_properties[] = {
+ DEFINE_PROP_UINT8("port", PCIESlot, port.port, 0),
+ DEFINE_PROP_UINT8("chassis", PCIESlot, chassis, 0),
+ DEFINE_PROP_UINT16("slot", PCIESlot, slot, 0),
+ DEFINE_PROP_UINT16("aer_log_max", PCIESlot,
+ port.br.dev.exp.aer_log.log_max,
+ PCIE_AER_LOG_MAX_DEFAULT),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void ioh3420_class_init(ObjectClass *klass, void *data)
+{
+ PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+
+ k->is_express = 1;
+ k->is_bridge = 1;
+ k->config_write = ioh3420_write_config;
+ k->init = ioh3420_initfn;
+ k->exit = ioh3420_exitfn;
+ k->vendor_id = PCI_VENDOR_ID_INTEL;
+ k->device_id = PCI_DEVICE_ID_IOH_EPORT;
+ k->revision = PCI_DEVICE_ID_IOH_REV;
+}
+
+static DeviceInfo ioh3420_info = {
+ .name = "ioh3420",
+ .desc = "Intel IOH device id 3420 PCIE Root Port",
+ .size = sizeof(PCIESlot),
+ .reset = ioh3420_reset,
+ .vmsd = &vmstate_ioh3420,
+ .props = ioh3420_properties,
+ .class_init = ioh3420_class_init,
};
static void ioh3420_register(void)
diff --git a/hw/ivshmem.c b/hw/ivshmem.c
index 7b4dbf6..cddbf21 100644
--- a/hw/ivshmem.c
+++ b/hw/ivshmem.c
@@ -760,25 +760,34 @@ static int pci_ivshmem_uninit(PCIDevice *dev)
return 0;
}
-static PCIDeviceInfo ivshmem_info = {
- .qdev.name = "ivshmem",
- .qdev.size = sizeof(IVShmemState),
- .qdev.reset = ivshmem_reset,
- .init = pci_ivshmem_init,
- .exit = pci_ivshmem_uninit,
- .vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET,
- .device_id = 0x1110,
- .class_id = PCI_CLASS_MEMORY_RAM,
- .qdev.props = (Property[]) {
- DEFINE_PROP_CHR("chardev", IVShmemState, server_chr),
- DEFINE_PROP_STRING("size", IVShmemState, sizearg),
- DEFINE_PROP_UINT32("vectors", IVShmemState, vectors, 1),
- DEFINE_PROP_BIT("ioeventfd", IVShmemState, features,
IVSHMEM_IOEVENTFD, false),
- DEFINE_PROP_BIT("msi", IVShmemState, features, IVSHMEM_MSI, true),
- DEFINE_PROP_STRING("shm", IVShmemState, shmobj),
- DEFINE_PROP_STRING("role", IVShmemState, role),
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property ivshmem_properties[] = {
+ DEFINE_PROP_CHR("chardev", IVShmemState, server_chr),
+ DEFINE_PROP_STRING("size", IVShmemState, sizearg),
+ DEFINE_PROP_UINT32("vectors", IVShmemState, vectors, 1),
+ DEFINE_PROP_BIT("ioeventfd", IVShmemState, features, IVSHMEM_IOEVENTFD,
false),
+ DEFINE_PROP_BIT("msi", IVShmemState, features, IVSHMEM_MSI, true),
+ DEFINE_PROP_STRING("shm", IVShmemState, shmobj),
+ DEFINE_PROP_STRING("role", IVShmemState, role),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void ivshmem_class_init(ObjectClass *klass, void *data)
+{
+ PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+
+ k->init = pci_ivshmem_init;
+ k->exit = pci_ivshmem_uninit;
+ k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
+ k->device_id = 0x1110;
+ k->class_id = PCI_CLASS_MEMORY_RAM;
+}
+
+static DeviceInfo ivshmem_info = {
+ .name = "ivshmem",
+ .size = sizeof(IVShmemState),
+ .reset = ivshmem_reset,
+ .props = ivshmem_properties,
+ .class_init = ivshmem_class_init,
};
static void ivshmem_register_devices(void)
diff --git a/hw/lsi53c895a.c b/hw/lsi53c895a.c
index 110ca44..025c85b 100644
--- a/hw/lsi53c895a.c
+++ b/hw/lsi53c895a.c
@@ -2120,18 +2120,25 @@ static int lsi_scsi_init(PCIDevice *dev)
return 0;
}
-static PCIDeviceInfo lsi_info = {
- .qdev.name = "lsi53c895a",
- .qdev.alias = "lsi",
- .qdev.size = sizeof(LSIState),
- .qdev.reset = lsi_scsi_reset,
- .qdev.vmsd = &vmstate_lsi_scsi,
- .init = lsi_scsi_init,
- .exit = lsi_scsi_uninit,
- .vendor_id = PCI_VENDOR_ID_LSI_LOGIC,
- .device_id = PCI_DEVICE_ID_LSI_53C895A,
- .class_id = PCI_CLASS_STORAGE_SCSI,
- .subsystem_id = 0x1000,
+static void lsi_class_init(ObjectClass *klass, void *data)
+{
+ PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+
+ k->init = lsi_scsi_init;
+ k->exit = lsi_scsi_uninit;
+ k->vendor_id = PCI_VENDOR_ID_LSI_LOGIC;
+ k->device_id = PCI_DEVICE_ID_LSI_53C895A;
+ k->class_id = PCI_CLASS_STORAGE_SCSI;
+ k->subsystem_id = 0x1000;
+}
+
+static DeviceInfo lsi_info = {
+ .name = "lsi53c895a",
+ .alias = "lsi",
+ .size = sizeof(LSIState),
+ .reset = lsi_scsi_reset,
+ .vmsd = &vmstate_lsi_scsi,
+ .class_init = lsi_class_init,
};
static void lsi53c895a_register_devices(void)
diff --git a/hw/ne2000.c b/hw/ne2000.c
index 16dcee2..6484aef 100644
--- a/hw/ne2000.c
+++ b/hw/ne2000.c
@@ -786,19 +786,28 @@ static int pci_ne2000_exit(PCIDevice *pci_dev)
return 0;
}
-static PCIDeviceInfo ne2000_info = {
- .qdev.name = "ne2k_pci",
- .qdev.size = sizeof(PCINE2000State),
- .qdev.vmsd = &vmstate_pci_ne2000,
- .init = pci_ne2000_init,
- .exit = pci_ne2000_exit,
- .vendor_id = PCI_VENDOR_ID_REALTEK,
- .device_id = PCI_DEVICE_ID_REALTEK_8029,
- .class_id = PCI_CLASS_NETWORK_ETHERNET,
- .qdev.props = (Property[]) {
- DEFINE_NIC_PROPERTIES(PCINE2000State, ne2000.c),
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property ne2000_properties[] = {
+ DEFINE_NIC_PROPERTIES(PCINE2000State, ne2000.c),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void ne2000_class_init(ObjectClass *klass, void *data)
+{
+ PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+
+ k->init = pci_ne2000_init;
+ k->exit = pci_ne2000_exit;
+ k->vendor_id = PCI_VENDOR_ID_REALTEK;
+ k->device_id = PCI_DEVICE_ID_REALTEK_8029;
+ k->class_id = PCI_CLASS_NETWORK_ETHERNET;
+}
+
+static DeviceInfo ne2000_info = {
+ .name = "ne2k_pci",
+ .size = sizeof(PCINE2000State),
+ .vmsd = &vmstate_pci_ne2000,
+ .props = ne2000_properties,
+ .class_init = ne2000_class_init,
};
static void ne2000_register_devices(void)
diff --git a/hw/pcnet-pci.c b/hw/pcnet-pci.c
index 4e164da..be3bd79 100644
--- a/hw/pcnet-pci.c
+++ b/hw/pcnet-pci.c
@@ -348,21 +348,30 @@ static void pci_reset(DeviceState *dev)
pcnet_h_reset(&d->state);
}
-static PCIDeviceInfo pcnet_info = {
- .qdev.name = "pcnet",
- .qdev.size = sizeof(PCIPCNetState),
- .qdev.reset = pci_reset,
- .qdev.vmsd = &vmstate_pci_pcnet,
- .init = pci_pcnet_init,
- .exit = pci_pcnet_uninit,
- .vendor_id = PCI_VENDOR_ID_AMD,
- .device_id = PCI_DEVICE_ID_AMD_LANCE,
- .revision = 0x10,
- .class_id = PCI_CLASS_NETWORK_ETHERNET,
- .qdev.props = (Property[]) {
- DEFINE_NIC_PROPERTIES(PCIPCNetState, state.conf),
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property pcnet_properties[] = {
+ DEFINE_NIC_PROPERTIES(PCIPCNetState, state.conf),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void pcnet_class_init(ObjectClass *klass, void *data)
+{
+ PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+
+ k->init = pci_pcnet_init;
+ k->exit = pci_pcnet_uninit;
+ k->vendor_id = PCI_VENDOR_ID_AMD;
+ k->device_id = PCI_DEVICE_ID_AMD_LANCE;
+ k->revision = 0x10;
+ k->class_id = PCI_CLASS_NETWORK_ETHERNET;
+}
+
+static DeviceInfo pcnet_info = {
+ .name = "pcnet",
+ .size = sizeof(PCIPCNetState),
+ .reset = pci_reset,
+ .vmsd = &vmstate_pci_pcnet,
+ .props = pcnet_properties,
+ .class_init = pcnet_class_init,
};
static void pci_pcnet_register_devices(void)
diff --git a/hw/ppce500_pci.c b/hw/ppce500_pci.c
index 960a5d0..622cd72 100644
--- a/hw/ppce500_pci.c
+++ b/hw/ppce500_pci.c
@@ -360,13 +360,20 @@ static int e500_pcihost_initfn(SysBusDevice *dev)
return 0;
}
-static PCIDeviceInfo e500_host_bridge_info = {
- .qdev.name = "e500-host-bridge",
- .qdev.desc = "Host bridge",
- .qdev.size = sizeof(PCIDevice),
- .vendor_id = PCI_VENDOR_ID_FREESCALE,
- .device_id = PCI_DEVICE_ID_MPC8533E,
- .class_id = PCI_CLASS_PROCESSOR_POWERPC,
+static void e500_host_bridge_class_init(ObjectClass *klass, void *data)
+{
+ PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+
+ k->vendor_id = PCI_VENDOR_ID_FREESCALE;
+ k->device_id = PCI_DEVICE_ID_MPC8533E;
+ k->class_id = PCI_CLASS_PROCESSOR_POWERPC;
+}
+
+static DeviceInfo e500_host_bridge_info = {
+ .name = "e500-host-bridge",
+ .desc = "Host bridge",
+ .size = sizeof(PCIDevice),
+ .class_init = e500_host_bridge_class_init,
};
static SysBusDeviceInfo e500_pcihost_info = {
diff --git a/hw/qxl.c b/hw/qxl.c
index 5f30525..3e2653d 100644
--- a/hw/qxl.c
+++ b/hw/qxl.c
@@ -1827,32 +1827,46 @@ static Property qxl_properties[] = {
DEFINE_PROP_END_OF_LIST(),
};
-static PCIDeviceInfo qxl_primary_info = {
- .qdev.name = "qxl-vga",
- .qdev.desc = "Spice QXL GPU (primary, vga compatible)",
- .qdev.size = sizeof(PCIQXLDevice),
- .qdev.reset = qxl_reset_handler,
- .qdev.vmsd = &qxl_vmstate,
- .no_hotplug = 1,
- .init = qxl_init_primary,
- .romfile = "vgabios-qxl.bin",
- .vendor_id = REDHAT_PCI_VENDOR_ID,
- .device_id = QXL_DEVICE_ID_STABLE,
- .class_id = PCI_CLASS_DISPLAY_VGA,
- .qdev.props = qxl_properties,
+static void qxl_primary_class_init(ObjectClass *klass, void *data)
+{
+ PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+
+ k->no_hotplug = 1;
+ k->init = qxl_init_primary;
+ k->romfile = "vgabios-qxl.bin";
+ k->vendor_id = REDHAT_PCI_VENDOR_ID;
+ k->device_id = QXL_DEVICE_ID_STABLE;
+ k->class_id = PCI_CLASS_DISPLAY_VGA;
+}
+
+static DeviceInfo qxl_primary_info = {
+ .name = "qxl-vga",
+ .desc = "Spice QXL GPU (primary, vga compatible)",
+ .size = sizeof(PCIQXLDevice),
+ .reset = qxl_reset_handler,
+ .vmsd = &qxl_vmstate,
+ .props = qxl_properties,
+ .class_init = qxl_primary_class_init,
};
-static PCIDeviceInfo qxl_secondary_info = {
- .qdev.name = "qxl",
- .qdev.desc = "Spice QXL GPU (secondary)",
- .qdev.size = sizeof(PCIQXLDevice),
- .qdev.reset = qxl_reset_handler,
- .qdev.vmsd = &qxl_vmstate,
- .init = qxl_init_secondary,
- .vendor_id = REDHAT_PCI_VENDOR_ID,
- .device_id = QXL_DEVICE_ID_STABLE,
- .class_id = PCI_CLASS_DISPLAY_OTHER,
- .qdev.props = qxl_properties,
+static void qxl_secondary_class_init(ObjectClass *klass, void *data)
+{
+ PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+
+ k->init = qxl_init_secondary;
+ k->vendor_id = REDHAT_PCI_VENDOR_ID;
+ k->device_id = QXL_DEVICE_ID_STABLE;
+ k->class_id = PCI_CLASS_DISPLAY_OTHER;
+}
+
+static DeviceInfo qxl_secondary_info = {
+ .name = "qxl",
+ .desc = "Spice QXL GPU (secondary)",
+ .size = sizeof(PCIQXLDevice),
+ .reset = qxl_reset_handler,
+ .vmsd = &qxl_vmstate,
+ .props = qxl_properties,
+ .class_init = qxl_secondary_class_init,
};
static void qxl_register(void)
diff --git a/hw/rtl8139.c b/hw/rtl8139.c
index 0143fa2..7ceabe6 100644
--- a/hw/rtl8139.c
+++ b/hw/rtl8139.c
@@ -3494,22 +3494,31 @@ static int pci_rtl8139_init(PCIDevice *dev)
return 0;
}
-static PCIDeviceInfo rtl8139_info = {
- .qdev.name = "rtl8139",
- .qdev.size = sizeof(RTL8139State),
- .qdev.reset = rtl8139_reset,
- .qdev.vmsd = &vmstate_rtl8139,
- .init = pci_rtl8139_init,
- .exit = pci_rtl8139_uninit,
- .romfile = "pxe-rtl8139.rom",
- .vendor_id = PCI_VENDOR_ID_REALTEK,
- .device_id = PCI_DEVICE_ID_REALTEK_8139,
- .revision = RTL8139_PCI_REVID, /* >=0x20 is for 8139C+ */
- .class_id = PCI_CLASS_NETWORK_ETHERNET,
- .qdev.props = (Property[]) {
- DEFINE_NIC_PROPERTIES(RTL8139State, conf),
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property rtl8139_properties[] = {
+ DEFINE_NIC_PROPERTIES(RTL8139State, conf),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void rtl8139_class_init(ObjectClass *klass, void *data)
+{
+ PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+
+ k->init = pci_rtl8139_init;
+ k->exit = pci_rtl8139_uninit;
+ k->romfile = "pxe-rtl8139.rom";
+ k->vendor_id = PCI_VENDOR_ID_REALTEK;
+ k->device_id = PCI_DEVICE_ID_REALTEK_8139;
+ k->revision = RTL8139_PCI_REVID, /* >=0x20 is for 8139C+ */;
+ k->class_id = PCI_CLASS_NETWORK_ETHERNET;
+}
+
+static DeviceInfo rtl8139_info = {
+ .name = "rtl8139",
+ .size = sizeof(RTL8139State),
+ .reset = rtl8139_reset,
+ .vmsd = &vmstate_rtl8139,
+ .props = rtl8139_properties,
+ .class_init = rtl8139_class_init,
};
static void rtl8139_register_devices(void)
diff --git a/hw/sh_pci.c b/hw/sh_pci.c
index 36f3930..d2a4130 100644
--- a/hw/sh_pci.c
+++ b/hw/sh_pci.c
@@ -168,12 +168,19 @@ static int sh_pci_host_init(PCIDevice *d)
return 0;
}
-static PCIDeviceInfo sh_pci_host_info = {
- .qdev.name = "sh_pci_host",
- .qdev.size = sizeof(PCIDevice),
- .init = sh_pci_host_init,
- .vendor_id = PCI_VENDOR_ID_HITACHI,
- .device_id = PCI_DEVICE_ID_HITACHI_SH7751R,
+static void sh_pci_host_class_init(ObjectClass *klass, void *data)
+{
+ PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+
+ k->init = sh_pci_host_init;
+ k->vendor_id = PCI_VENDOR_ID_HITACHI;
+ k->device_id = PCI_DEVICE_ID_HITACHI_SH7751R;
+}
+
+static DeviceInfo sh_pci_host_info = {
+ .name = "sh_pci_host",
+ .size = sizeof(PCIDevice),
+ .class_init = sh_pci_host_class_init,
};
static void sh_pci_register_devices(void)
diff --git a/hw/spapr_pci.c b/hw/spapr_pci.c
index f456501..a5bddda 100644
--- a/hw/spapr_pci.c
+++ b/hw/spapr_pci.c
@@ -190,10 +190,17 @@ static int spapr_main_pci_host_init(PCIDevice *d)
return 0;
}
-static PCIDeviceInfo spapr_main_pci_host_info = {
- .qdev.name = "spapr-pci-host-bridge",
- .qdev.size = sizeof(PCIDevice),
- .init = spapr_main_pci_host_init,
+static void spapr_main_pci_host_class_init(ObjectClass *klass, void *data)
+{
+ PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+
+ k->init = spapr_main_pci_host_init;
+}
+
+static DeviceInfo spapr_main_pci_host_info = {
+ .name = "spapr-pci-host-bridge",
+ .size = sizeof(PCIDevice),
+ .class_init = spapr_main_pci_host_class_init,
};
static void spapr_register_devices(void)
diff --git a/hw/sun4u.c b/hw/sun4u.c
index eaaefe3..f3240a6 100644
--- a/hw/sun4u.c
+++ b/hw/sun4u.c
@@ -557,14 +557,21 @@ pci_ebus_init1(PCIDevice *pci_dev)
return 0;
}
-static PCIDeviceInfo ebus_info = {
- .qdev.name = "ebus",
- .qdev.size = sizeof(EbusState),
- .init = pci_ebus_init1,
- .vendor_id = PCI_VENDOR_ID_SUN,
- .device_id = PCI_DEVICE_ID_SUN_EBUS,
- .revision = 0x01,
- .class_id = PCI_CLASS_BRIDGE_OTHER,
+static void ebus_class_init(ObjectClass *klass, void *data)
+{
+ PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+
+ k->init = pci_ebus_init1;
+ k->vendor_id = PCI_VENDOR_ID_SUN;
+ k->device_id = PCI_DEVICE_ID_SUN_EBUS;
+ k->revision = 0x01;
+ k->class_id = PCI_CLASS_BRIDGE_OTHER;
+}
+
+static DeviceInfo ebus_info = {
+ .name = "ebus",
+ .size = sizeof(EbusState),
+ .class_init = ebus_class_init,
};
static void pci_ebus_register(void)
diff --git a/hw/unin_pci.c b/hw/unin_pci.c
index 4299052..ac443a2 100644
--- a/hw/unin_pci.c
+++ b/hw/unin_pci.c
@@ -334,44 +334,72 @@ static int unin_internal_pci_host_init(PCIDevice *d)
return 0;
}
-static PCIDeviceInfo unin_main_pci_host_info = {
- .qdev.name = "uni-north",
- .qdev.size = sizeof(PCIDevice),
- .init = unin_main_pci_host_init,
- .vendor_id = PCI_VENDOR_ID_APPLE,
- .device_id = PCI_DEVICE_ID_APPLE_UNI_N_PCI,
- .revision = 0x00,
- .class_id = PCI_CLASS_BRIDGE_HOST,
+static void unin_main_pci_host_class_init(ObjectClass *klass, void *data)
+{
+ PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+
+ k->init = unin_main_pci_host_init;
+ k->vendor_id = PCI_VENDOR_ID_APPLE;
+ k->device_id = PCI_DEVICE_ID_APPLE_UNI_N_PCI;
+ k->revision = 0x00;
+ k->class_id = PCI_CLASS_BRIDGE_HOST;
+}
+
+static DeviceInfo unin_main_pci_host_info = {
+ .name = "uni-north",
+ .size = sizeof(PCIDevice),
+ .class_init = unin_main_pci_host_class_init,
};
-static PCIDeviceInfo u3_agp_pci_host_info = {
- .qdev.name = "u3-agp",
- .qdev.size = sizeof(PCIDevice),
- .init = u3_agp_pci_host_init,
- .vendor_id = PCI_VENDOR_ID_APPLE,
- .device_id = PCI_DEVICE_ID_APPLE_U3_AGP,
- .revision = 0x00,
- .class_id = PCI_CLASS_BRIDGE_HOST,
+static void u3_agp_pci_host_class_init(ObjectClass *klass, void *data)
+{
+ PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+
+ k->init = u3_agp_pci_host_init;
+ k->vendor_id = PCI_VENDOR_ID_APPLE;
+ k->device_id = PCI_DEVICE_ID_APPLE_U3_AGP;
+ k->revision = 0x00;
+ k->class_id = PCI_CLASS_BRIDGE_HOST;
+}
+
+static DeviceInfo u3_agp_pci_host_info = {
+ .name = "u3-agp",
+ .size = sizeof(PCIDevice),
+ .class_init = u3_agp_pci_host_class_init,
};
-static PCIDeviceInfo unin_agp_pci_host_info = {
- .qdev.name = "uni-north-agp",
- .qdev.size = sizeof(PCIDevice),
- .init = unin_agp_pci_host_init,
- .vendor_id = PCI_VENDOR_ID_APPLE,
- .device_id = PCI_DEVICE_ID_APPLE_UNI_N_AGP,
- .revision = 0x00,
- .class_id = PCI_CLASS_BRIDGE_HOST,
+static void unin_agp_pci_host_class_init(ObjectClass *klass, void *data)
+{
+ PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+
+ k->init = unin_agp_pci_host_init;
+ k->vendor_id = PCI_VENDOR_ID_APPLE;
+ k->device_id = PCI_DEVICE_ID_APPLE_UNI_N_AGP;
+ k->revision = 0x00;
+ k->class_id = PCI_CLASS_BRIDGE_HOST;
+}
+
+static DeviceInfo unin_agp_pci_host_info = {
+ .name = "uni-north-agp",
+ .size = sizeof(PCIDevice),
+ .class_init = unin_agp_pci_host_class_init,
};
-static PCIDeviceInfo unin_internal_pci_host_info = {
- .qdev.name = "uni-north-pci",
- .qdev.size = sizeof(PCIDevice),
- .init = unin_internal_pci_host_init,
- .vendor_id = PCI_VENDOR_ID_APPLE,
- .device_id = PCI_DEVICE_ID_APPLE_UNI_N_I_PCI,
- .revision = 0x00,
- .class_id = PCI_CLASS_BRIDGE_HOST,
+static void unin_internal_pci_host_class_init(ObjectClass *klass, void *data)
+{
+ PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+
+ k->init = unin_internal_pci_host_init;
+ k->vendor_id = PCI_VENDOR_ID_APPLE;
+ k->device_id = PCI_DEVICE_ID_APPLE_UNI_N_I_PCI;
+ k->revision = 0x00;
+ k->class_id = PCI_CLASS_BRIDGE_HOST;
+}
+
+static DeviceInfo unin_internal_pci_host_info = {
+ .name = "uni-north-pci",
+ .size = sizeof(PCIDevice),
+ .class_init = unin_internal_pci_host_class_init,
};
static void unin_register_devices(void)
diff --git a/hw/usb-ohci.c b/hw/usb-ohci.c
index 194c994..3378fc0 100644
--- a/hw/usb-ohci.c
+++ b/hw/usb-ohci.c
@@ -1834,20 +1834,29 @@ static int ohci_init_pxa(SysBusDevice *dev)
return 0;
}
-static PCIDeviceInfo ohci_pci_info = {
- .qdev.name = "pci-ohci",
- .qdev.desc = "Apple USB Controller",
- .qdev.size = sizeof(OHCIPCIState),
- .init = usb_ohci_initfn_pci,
- .vendor_id = PCI_VENDOR_ID_APPLE,
- .device_id = PCI_DEVICE_ID_APPLE_IPID_USB,
- .class_id = PCI_CLASS_SERIAL_USB,
- .qdev.props = (Property[]) {
- DEFINE_PROP_STRING("masterbus", OHCIPCIState, masterbus),
- DEFINE_PROP_UINT32("num-ports", OHCIPCIState, num_ports, 3),
- DEFINE_PROP_UINT32("firstport", OHCIPCIState, firstport, 0),
- DEFINE_PROP_END_OF_LIST(),
- },
+static Property ohci_pci_properties[] = {
+ DEFINE_PROP_STRING("masterbus", OHCIPCIState, masterbus),
+ DEFINE_PROP_UINT32("num-ports", OHCIPCIState, num_ports, 3),
+ DEFINE_PROP_UINT32("firstport", OHCIPCIState, firstport, 0),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void ohci_pci_class_init(ObjectClass *klass, void *data)
+{
+ PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+
+ k->init = usb_ohci_initfn_pci;
+ k->vendor_id = PCI_VENDOR_ID_APPLE;
+ k->device_id = PCI_DEVICE_ID_APPLE_IPID_USB;
+ k->class_id = PCI_CLASS_SERIAL_USB;
+}
+
+static DeviceInfo ohci_pci_info = {
+ .name = "pci-ohci",
+ .desc = "Apple USB Controller",
+ .size = sizeof(OHCIPCIState),
+ .props = ohci_pci_properties,
+ .class_init = ohci_pci_class_init,
};
static SysBusDeviceInfo ohci_sysbus_info = {
diff --git a/hw/versatile_pci.c b/hw/versatile_pci.c
index 8a88696..5710177 100644
--- a/hw/versatile_pci.c
+++ b/hw/versatile_pci.c
@@ -109,14 +109,20 @@ static int versatile_pci_host_init(PCIDevice *d)
return 0;
}
-static PCIDeviceInfo versatile_pci_host_info = {
- .qdev.name = "versatile_pci_host",
- .qdev.size = sizeof(PCIDevice),
- .init = versatile_pci_host_init,
- .vendor_id = PCI_VENDOR_ID_XILINX,
- /* Both boards have the same device ID. Oh well. */
- .device_id = PCI_DEVICE_ID_XILINX_XC2VP30,
- .class_id = PCI_CLASS_PROCESSOR_CO,
+static void versatile_pci_host_class_init(ObjectClass *klass, void *data)
+{
+ PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+
+ k->init = versatile_pci_host_init;
+ k->vendor_id = PCI_VENDOR_ID_XILINX;
+ k->device_id = PCI_DEVICE_ID_XILINX_XC2VP30;
+ k->class_id = PCI_CLASS_PROCESSOR_CO;
+}
+
+static DeviceInfo versatile_pci_host_info = {
+ .name = "versatile_pci_host",
+ .size = sizeof(PCIDevice),
+ .class_init = versatile_pci_host_class_init,
};
static void versatile_pci_register_devices(void)
diff --git a/hw/vga-pci.c b/hw/vga-pci.c
index a75dbf3..ef9f8a5 100644
--- a/hw/vga-pci.c
+++ b/hw/vga-pci.c
@@ -75,18 +75,23 @@ DeviceState *pci_vga_init(PCIBus *bus)
return &pci_create_simple(bus, -1, "VGA")->qdev;
}
-static PCIDeviceInfo vga_info = {
- .qdev.name = "VGA",
- .qdev.size = sizeof(PCIVGAState),
- .qdev.vmsd = &vmstate_vga_pci,
- .no_hotplug = 1,
- .init = pci_vga_initfn,
- .romfile = "vgabios-stdvga.bin",
+static void vga_class_init(ObjectClass *klass, void *data)
+{
+ PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+
+ k->no_hotplug = 1;
+ k->init = pci_vga_initfn;
+ k->romfile = "vgabios-stdvga.bin";
+ k->vendor_id = PCI_VENDOR_ID_QEMU;
+ k->device_id = PCI_DEVICE_ID_QEMU_VGA;
+ k->class_id = PCI_CLASS_DISPLAY_VGA;
+}
- /* dummy VGA (same as Bochs ID) */
- .vendor_id = PCI_VENDOR_ID_QEMU,
- .device_id = PCI_DEVICE_ID_QEMU_VGA,
- .class_id = PCI_CLASS_DISPLAY_VGA,
+static DeviceInfo vga_info = {
+ .name = "VGA",
+ .size = sizeof(PCIVGAState),
+ .vmsd = &vmstate_vga_pci,
+ .class_init = vga_class_init,
};
static void vga_register(void)
diff --git a/hw/vmware_vga.c b/hw/vmware_vga.c
index af70bde..e2791cb 100644
--- a/hw/vmware_vga.c
+++ b/hw/vmware_vga.c
@@ -1198,20 +1198,26 @@ static int pci_vmsvga_initfn(PCIDevice *dev)
return 0;
}
-static PCIDeviceInfo vmsvga_info = {
- .qdev.name = "vmware-svga",
- .qdev.size = sizeof(struct pci_vmsvga_state_s),
- .qdev.vmsd = &vmstate_vmware_vga,
- .qdev.reset = vmsvga_reset,
- .no_hotplug = 1,
- .init = pci_vmsvga_initfn,
- .romfile = "vgabios-vmware.bin",
-
- .vendor_id = PCI_VENDOR_ID_VMWARE,
- .device_id = SVGA_PCI_DEVICE_ID,
- .class_id = PCI_CLASS_DISPLAY_VGA,
- .subsystem_vendor_id = PCI_VENDOR_ID_VMWARE,
- .subsystem_id = SVGA_PCI_DEVICE_ID,
+static void vmsvga_class_init(ObjectClass *klass, void *data)
+{
+ PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+
+ k->no_hotplug = 1;
+ k->init = pci_vmsvga_initfn;
+ k->romfile = "vgabios-vmware.bin";
+ k->vendor_id = PCI_VENDOR_ID_VMWARE;
+ k->device_id = SVGA_PCI_DEVICE_ID;
+ k->class_id = PCI_CLASS_DISPLAY_VGA;
+ k->subsystem_vendor_id = PCI_VENDOR_ID_VMWARE;
+ k->subsystem_id = SVGA_PCI_DEVICE_ID;
+}
+
+static DeviceInfo vmsvga_info = {
+ .name = "vmware-svga",
+ .size = sizeof(struct pci_vmsvga_state_s),
+ .vmsd = &vmstate_vmware_vga,
+ .reset = vmsvga_reset,
+ .class_init = vmsvga_class_init,
};
static void vmsvga_register(void)
diff --git a/hw/vt82c686.c b/hw/vt82c686.c
index 2845959..e3f677b 100644
--- a/hw/vt82c686.c
+++ b/hw/vt82c686.c
@@ -343,15 +343,22 @@ void vt82c686b_ac97_init(PCIBus *bus, int devfn)
qdev_init_nofail(&dev->qdev);
}
-static PCIDeviceInfo via_ac97_info = {
- .qdev.name = "VT82C686B_AC97",
- .qdev.desc = "AC97",
- .qdev.size = sizeof(VT686AC97State),
- .init = vt82c686b_ac97_initfn,
- .vendor_id = PCI_VENDOR_ID_VIA,
- .device_id = PCI_DEVICE_ID_VIA_AC97,
- .revision = 0x50,
- .class_id = PCI_CLASS_MULTIMEDIA_AUDIO,
+static void via_ac97_class_init(ObjectClass *klass, void *data)
+{
+ PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+
+ k->init = vt82c686b_ac97_initfn;
+ k->vendor_id = PCI_VENDOR_ID_VIA;
+ k->device_id = PCI_DEVICE_ID_VIA_AC97;
+ k->revision = 0x50;
+ k->class_id = PCI_CLASS_MULTIMEDIA_AUDIO;
+}
+
+static DeviceInfo via_ac97_info = {
+ .name = "VT82C686B_AC97",
+ .desc = "AC97",
+ .size = sizeof(VT686AC97State),
+ .class_init = via_ac97_class_init,
};
static void vt82c686b_ac97_register(void)
@@ -382,15 +389,22 @@ void vt82c686b_mc97_init(PCIBus *bus, int devfn)
qdev_init_nofail(&dev->qdev);
}
-static PCIDeviceInfo via_mc97_info = {
- .qdev.name = "VT82C686B_MC97",
- .qdev.desc = "MC97",
- .qdev.size = sizeof(VT686MC97State),
- .init = vt82c686b_mc97_initfn,
- .vendor_id = PCI_VENDOR_ID_VIA,
- .device_id = PCI_DEVICE_ID_VIA_MC97,
- .class_id = PCI_CLASS_COMMUNICATION_OTHER,
- .revision = 0x30,
+static void via_mc97_class_init(ObjectClass *klass, void *data)
+{
+ PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+
+ k->init = vt82c686b_mc97_initfn;
+ k->vendor_id = PCI_VENDOR_ID_VIA;
+ k->device_id = PCI_DEVICE_ID_VIA_MC97;
+ k->class_id = PCI_CLASS_COMMUNICATION_OTHER;
+ k->revision = 0x30;
+}
+
+static DeviceInfo via_mc97_info = {
+ .name = "VT82C686B_MC97",
+ .desc = "MC97",
+ .size = sizeof(VT686MC97State),
+ .class_init = via_mc97_class_init,
};
static void vt82c686b_mc97_register(void)
@@ -448,21 +462,30 @@ i2c_bus *vt82c686b_pm_init(PCIBus *bus, int devfn,
uint32_t smb_io_base,
return s->smb.smbus;
}
-static PCIDeviceInfo via_pm_info = {
- .qdev.name = "VT82C686B_PM",
- .qdev.desc = "PM",
- .qdev.size = sizeof(VT686PMState),
- .qdev.vmsd = &vmstate_acpi,
- .init = vt82c686b_pm_initfn,
- .config_write = pm_write_config,
- .vendor_id = PCI_VENDOR_ID_VIA,
- .device_id = PCI_DEVICE_ID_VIA_ACPI,
- .class_id = PCI_CLASS_BRIDGE_OTHER,
- .revision = 0x40,
- .qdev.props = (Property[]) {
- DEFINE_PROP_UINT32("smb_io_base", VT686PMState, smb_io_base, 0),
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property via_pm_properties[] = {
+ DEFINE_PROP_UINT32("smb_io_base", VT686PMState, smb_io_base, 0),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void via_pm_class_init(ObjectClass *klass, void *data)
+{
+ PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+
+ k->init = vt82c686b_pm_initfn;
+ k->config_write = pm_write_config;
+ k->vendor_id = PCI_VENDOR_ID_VIA;
+ k->device_id = PCI_DEVICE_ID_VIA_ACPI;
+ k->class_id = PCI_CLASS_BRIDGE_OTHER;
+ k->revision = 0x40;
+}
+
+static DeviceInfo via_pm_info = {
+ .name = "VT82C686B_PM",
+ .desc = "PM",
+ .size = sizeof(VT686PMState),
+ .vmsd = &vmstate_acpi,
+ .props = via_pm_properties,
+ .class_init = via_pm_class_init,
};
static void vt82c686b_pm_register(void)
@@ -516,18 +539,25 @@ int vt82c686b_init(PCIBus *bus, int devfn)
return d->devfn;
}
-static PCIDeviceInfo via_info = {
- .qdev.name = "VT82C686B",
- .qdev.desc = "ISA bridge",
- .qdev.size = sizeof(VT82C686BState),
- .qdev.vmsd = &vmstate_via,
- .qdev.no_user = 1,
- .init = vt82c686b_initfn,
- .config_write = vt82c686b_write_config,
- .vendor_id = PCI_VENDOR_ID_VIA,
- .device_id = PCI_DEVICE_ID_VIA_ISA_BRIDGE,
- .class_id = PCI_CLASS_BRIDGE_ISA,
- .revision = 0x40,
+static void via_class_init(ObjectClass *klass, void *data)
+{
+ PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+
+ k->init = vt82c686b_initfn;
+ k->config_write = vt82c686b_write_config;
+ k->vendor_id = PCI_VENDOR_ID_VIA;
+ k->device_id = PCI_DEVICE_ID_VIA_ISA_BRIDGE;
+ k->class_id = PCI_CLASS_BRIDGE_ISA;
+ k->revision = 0x40;
+}
+
+static DeviceInfo via_info = {
+ .name = "VT82C686B",
+ .desc = "ISA bridge",
+ .size = sizeof(VT82C686BState),
+ .vmsd = &vmstate_via,
+ .no_user = 1,
+ .class_init = via_class_init,
};
static void vt82c686b_register(void)
diff --git a/hw/wdt_i6300esb.c b/hw/wdt_i6300esb.c
index 205c32b..a6ceff8 100644
--- a/hw/wdt_i6300esb.c
+++ b/hw/wdt_i6300esb.c
@@ -425,18 +425,25 @@ static WatchdogTimerModel model = {
.wdt_description = "Intel 6300ESB",
};
-static PCIDeviceInfo i6300esb_info = {
- .qdev.name = "i6300esb",
- .qdev.size = sizeof(I6300State),
- .qdev.vmsd = &vmstate_i6300esb,
- .qdev.reset = i6300esb_reset,
- .config_read = i6300esb_config_read,
- .config_write = i6300esb_config_write,
- .init = i6300esb_init,
- .exit = i6300esb_exit,
- .vendor_id = PCI_VENDOR_ID_INTEL,
- .device_id = PCI_DEVICE_ID_INTEL_ESB_9,
- .class_id = PCI_CLASS_SYSTEM_OTHER,
+static void i6300esb_class_init(ObjectClass *klass, void *data)
+{
+ PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+
+ k->config_read = i6300esb_config_read;
+ k->config_write = i6300esb_config_write;
+ k->init = i6300esb_init;
+ k->exit = i6300esb_exit;
+ k->vendor_id = PCI_VENDOR_ID_INTEL;
+ k->device_id = PCI_DEVICE_ID_INTEL_ESB_9;
+ k->class_id = PCI_CLASS_SYSTEM_OTHER;
+}
+
+static DeviceInfo i6300esb_info = {
+ .name = "i6300esb",
+ .size = sizeof(I6300State),
+ .vmsd = &vmstate_i6300esb,
+ .reset = i6300esb_reset,
+ .class_init = i6300esb_class_init,
};
static void i6300esb_register_devices(void)
diff --git a/hw/xen_platform.c b/hw/xen_platform.c
index 5e792f5..6535c1b 100644
--- a/hw/xen_platform.c
+++ b/hw/xen_platform.c
@@ -372,20 +372,26 @@ static void platform_reset(DeviceState *dev)
platform_fixed_ioport_reset(s);
}
-static PCIDeviceInfo xen_platform_info = {
- .init = xen_platform_initfn,
- .qdev.name = "xen-platform",
- .qdev.desc = "XEN platform pci device",
- .qdev.size = sizeof(PCIXenPlatformState),
- .qdev.vmsd = &vmstate_xen_platform,
- .qdev.reset = platform_reset,
-
- .vendor_id = PCI_VENDOR_ID_XEN,
- .device_id = PCI_DEVICE_ID_XEN_PLATFORM,
- .class_id = PCI_CLASS_OTHERS << 8 | 0x80,
- .subsystem_vendor_id = PCI_VENDOR_ID_XEN,
- .subsystem_id = PCI_DEVICE_ID_XEN_PLATFORM,
- .revision = 1,
+static void xen_platform_class_init(ObjectClass *klass, void *data)
+{
+ PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+
+ k->init = xen_platform_initfn;
+ k->vendor_id = PCI_VENDOR_ID_XEN;
+ k->device_id = PCI_DEVICE_ID_XEN_PLATFORM;
+ k->class_id = PCI_CLASS_OTHERS << 8 | 0x80;
+ k->subsystem_vendor_id = PCI_VENDOR_ID_XEN;
+ k->subsystem_id = PCI_DEVICE_ID_XEN_PLATFORM;
+ k->revision = 1;
+}
+
+static DeviceInfo xen_platform_info = {
+ .name = "xen-platform",
+ .desc = "XEN platform pci device",
+ .size = sizeof(PCIXenPlatformState),
+ .vmsd = &vmstate_xen_platform,
+ .reset = platform_reset,
+ .class_init = xen_platform_class_init,
};
static void xen_platform_register(void)
diff --git a/hw/xio3130_downstream.c b/hw/xio3130_downstream.c
index cb34c6f..6d625cb 100644
--- a/hw/xio3130_downstream.c
+++ b/hw/xio3130_downstream.c
@@ -167,31 +167,38 @@ static const VMStateDescription
vmstate_xio3130_downstream = {
}
};
-static PCIDeviceInfo xio3130_downstream_info = {
- .qdev.name = "xio3130-downstream",
- .qdev.desc = "TI X3130 Downstream Port of PCI Express Switch",
- .qdev.size = sizeof(PCIESlot),
- .qdev.reset = xio3130_downstream_reset,
- .qdev.vmsd = &vmstate_xio3130_downstream,
-
- .is_express = 1,
- .is_bridge = 1,
- .config_write = xio3130_downstream_write_config,
- .init = xio3130_downstream_initfn,
- .exit = xio3130_downstream_exitfn,
- .vendor_id = PCI_VENDOR_ID_TI,
- .device_id = PCI_DEVICE_ID_TI_XIO3130D,
- .revision = XIO3130_REVISION,
-
- .qdev.props = (Property[]) {
- DEFINE_PROP_UINT8("port", PCIESlot, port.port, 0),
- DEFINE_PROP_UINT8("chassis", PCIESlot, chassis, 0),
- DEFINE_PROP_UINT16("slot", PCIESlot, slot, 0),
- DEFINE_PROP_UINT16("aer_log_max", PCIESlot,
- port.br.dev.exp.aer_log.log_max,
- PCIE_AER_LOG_MAX_DEFAULT),
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property xio3130_downstream_properties[] = {
+ DEFINE_PROP_UINT8("port", PCIESlot, port.port, 0),
+ DEFINE_PROP_UINT8("chassis", PCIESlot, chassis, 0),
+ DEFINE_PROP_UINT16("slot", PCIESlot, slot, 0),
+ DEFINE_PROP_UINT16("aer_log_max", PCIESlot,
+ port.br.dev.exp.aer_log.log_max,
+ PCIE_AER_LOG_MAX_DEFAULT),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void xio3130_downstream_class_init(ObjectClass *klass, void *data)
+{
+ PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+
+ k->is_express = 1;
+ k->is_bridge = 1;
+ k->config_write = xio3130_downstream_write_config;
+ k->init = xio3130_downstream_initfn;
+ k->exit = xio3130_downstream_exitfn;
+ k->vendor_id = PCI_VENDOR_ID_TI;
+ k->device_id = PCI_DEVICE_ID_TI_XIO3130D;
+ k->revision = XIO3130_REVISION;
+}
+
+static DeviceInfo xio3130_downstream_info = {
+ .name = "xio3130-downstream",
+ .desc = "TI X3130 Downstream Port of PCI Express Switch",
+ .size = sizeof(PCIESlot),
+ .reset = xio3130_downstream_reset,
+ .vmsd = &vmstate_xio3130_downstream,
+ .props = xio3130_downstream_properties,
+ .class_init = xio3130_downstream_class_init,
};
static void xio3130_downstream_register(void)
diff --git a/hw/xio3130_upstream.c b/hw/xio3130_upstream.c
index 9c16ef2..ec4c5e3 100644
--- a/hw/xio3130_upstream.c
+++ b/hw/xio3130_upstream.c
@@ -144,28 +144,35 @@ static const VMStateDescription vmstate_xio3130_upstream
= {
}
};
-static PCIDeviceInfo xio3130_upstream_info = {
- .qdev.name = "x3130-upstream",
- .qdev.desc = "TI X3130 Upstream Port of PCI Express Switch",
- .qdev.size = sizeof(PCIEPort),
- .qdev.reset = xio3130_upstream_reset,
- .qdev.vmsd = &vmstate_xio3130_upstream,
-
- .is_express = 1,
- .is_bridge = 1,
- .config_write = xio3130_upstream_write_config,
- .init = xio3130_upstream_initfn,
- .exit = xio3130_upstream_exitfn,
- .vendor_id = PCI_VENDOR_ID_TI,
- .device_id = PCI_DEVICE_ID_TI_XIO3130U,
- .revision = XIO3130_REVISION,
-
- .qdev.props = (Property[]) {
- DEFINE_PROP_UINT8("port", PCIEPort, port, 0),
- DEFINE_PROP_UINT16("aer_log_max", PCIEPort, br.dev.exp.aer_log.log_max,
- PCIE_AER_LOG_MAX_DEFAULT),
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property xio3130_upstream_properties[] = {
+ DEFINE_PROP_UINT8("port", PCIEPort, port, 0),
+ DEFINE_PROP_UINT16("aer_log_max", PCIEPort, br.dev.exp.aer_log.log_max,
+ PCIE_AER_LOG_MAX_DEFAULT),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void xio3130_upstream_class_init(ObjectClass *klass, void *data)
+{
+ PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+
+ k->is_express = 1;
+ k->is_bridge = 1;
+ k->config_write = xio3130_upstream_write_config;
+ k->init = xio3130_upstream_initfn;
+ k->exit = xio3130_upstream_exitfn;
+ k->vendor_id = PCI_VENDOR_ID_TI;
+ k->device_id = PCI_DEVICE_ID_TI_XIO3130U;
+ k->revision = XIO3130_REVISION;
+}
+
+static DeviceInfo xio3130_upstream_info = {
+ .name = "x3130-upstream",
+ .desc = "TI X3130 Upstream Port of PCI Express Switch",
+ .size = sizeof(PCIEPort),
+ .reset = xio3130_upstream_reset,
+ .vmsd = &vmstate_xio3130_upstream,
+ .props = xio3130_upstream_properties,
+ .class_init = xio3130_upstream_class_init,
};
static void xio3130_upstream_register(void)
--
1.7.4.1
- [Qemu-devel] [PATCH v3 062/197] killall HDACodecDeviceInfo, (continued)
- [Qemu-devel] [PATCH v3 062/197] killall HDACodecDeviceInfo, Anthony Liguori, 2011/12/12
- [Qemu-devel] [PATCH v3 028/197] more renames, Anthony Liguori, 2011/12/12
- [Qemu-devel] [PATCH v3 053/197] kill off SCSIDeviceInfo, Anthony Liguori, 2011/12/12
- [Qemu-devel] [PATCH v3 019/197] bug fix spotted by paolo, Anthony Liguori, 2011/12/12
- [Qemu-devel] [PATCH v3 014/197] rtc: make piix3 set the rtc as a child (v2), Anthony Liguori, 2011/12/12
- [Qemu-devel] [PATCH v3 031/197] qdev: don't access name through info, Anthony Liguori, 2011/12/12
- [Qemu-devel] [PATCH v3 063/197] make spapr a bit more patch monkey friendly, Anthony Liguori, 2011/12/12
- [Qemu-devel] [PATCH v3 004/197] qom: introduce root device, Anthony Liguori, 2011/12/12
- [Qemu-devel] [PATCH v3 044/197] usb: don't access dev->info directly, Anthony Liguori, 2011/12/12
- [Qemu-devel] [PATCH v3 026/197] qom: add qobject, Anthony Liguori, 2011/12/12
- [Qemu-devel] [PATCH v3 068/197] Patch monkey PCIDeviceInfo conversion,
Anthony Liguori <=