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[Qemu-devel] [PATCH 4/4] tcg: Allow to detect TCGv misuses


From: Andreas Färber
Subject: [Qemu-devel] [PATCH 4/4] tcg: Allow to detect TCGv misuses
Date: Sat, 10 Dec 2011 10:02:27 +0100

It's easy to omit _i32 somewhere if working on one 32-bit target,
despite DEBUG_TCGV, because TCGv is simply aliased to TCGv_i32/i64.

If DEBUG_TCGV_TL is defined, use a new struct TCGv with distinguished
accessors to catch mixups.

This cannot be done unconditionally for DEBUG_TCGV because some targets
use TCGv and TCGv_i32/i64 interchangeably depending on TARGET_*.

Signed-off-by: Andreas Färber <address@hidden>
---
 def-helper.h |   13 ++++++++-----
 tcg/tcg-op.h |   14 ++++++++++++++
 tcg/tcg.h    |    1 +
 3 files changed, 23 insertions(+), 5 deletions(-)

diff --git a/def-helper.h b/def-helper.h
index 8a822c7..5be1110 100644
--- a/def-helper.h
+++ b/def-helper.h
@@ -22,8 +22,11 @@
 
 #define GET_TCGV_i32 GET_TCGV_I32
 #define GET_TCGV_i64 GET_TCGV_I64
+#define GET_TCGV_tl  GET_TCGV_TL
 #define GET_TCGV_ptr GET_TCGV_PTR
 
+#define TCGv_tl TCGv
+
 /* Some types that make sense in C, but not for TCG.  */
 #define dh_alias_i32 i32
 #define dh_alias_s32 i32
@@ -32,11 +35,7 @@
 #define dh_alias_s64 i64
 #define dh_alias_f32 i32
 #define dh_alias_f64 i64
-#if TARGET_LONG_BITS == 32
-#define dh_alias_tl i32
-#else
-#define dh_alias_tl i64
-#endif
+#define dh_alias_tl tl
 #define dh_alias_ptr ptr
 #define dh_alias_void void
 #define dh_alias_env ptr
@@ -60,24 +59,28 @@
 #define dh_retvar_decl0_void void
 #define dh_retvar_decl0_i32 TCGv_i32 retval
 #define dh_retvar_decl0_i64 TCGv_i64 retval
+#define dh_retvar_decl0_tl  TCGv retval
 #define dh_retvar_decl0_ptr TCGv_ptr retval
 #define dh_retvar_decl0(t) glue(dh_retvar_decl0_, dh_alias(t))
 
 #define dh_retvar_decl_void
 #define dh_retvar_decl_i32 TCGv_i32 retval,
 #define dh_retvar_decl_i64 TCGv_i64 retval,
+#define dh_retvar_decl_tl  TCGv retval,
 #define dh_retvar_decl_ptr TCGv_ptr retval,
 #define dh_retvar_decl(t) glue(dh_retvar_decl_, dh_alias(t))
 
 #define dh_retvar_void TCG_CALL_DUMMY_ARG
 #define dh_retvar_i32 GET_TCGV_i32(retval)
 #define dh_retvar_i64 GET_TCGV_i64(retval)
+#define dh_retvar_tl  GET_TCGV_tl(retval)
 #define dh_retvar_ptr GET_TCGV_ptr(retval)
 #define dh_retvar(t) glue(dh_retvar_, dh_alias(t))
 
 #define dh_is_64bit_void 0
 #define dh_is_64bit_i32 0
 #define dh_is_64bit_i64 1
+#define dh_is_64bit_tl (TARGET_LONG_BITS == 64)
 #define dh_is_64bit_ptr (TCG_TARGET_REG_BITS == 64)
 #define dh_is_64bit(t) glue(dh_is_64bit_, dh_alias(t))
 
diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h
index a6c3d5f..d065e74 100644
--- a/tcg/tcg-op.h
+++ b/tcg/tcg-op.h
@@ -2125,6 +2125,18 @@ static inline void tcg_gen_deposit_i64(TCGv_i64 ret, 
TCGv_i64 arg1,
 #error must include QEMU headers
 #endif
 
+#if defined(DEBUG_TCGV) && defined(DEBUG_TCGV_TL)
+
+typedef struct {
+    int itl;
+} TCGv;
+
+#define MAKE_TCGV_TL(i) __extension__                  \
+    ({ TCGv make_tcgv_tmp = {i}; make_tcgv_tmp; })
+#define GET_TCGV_TL(t) ((t).itl)
+
+#else /* !DEBUG_TCGV_TL */
+
 #if TARGET_LONG_BITS == 32
 #define TCGv TCGv_i32
 #define MAKE_TCGV_TL(x) MAKE_TCGV_I32(x)
@@ -2135,6 +2147,8 @@ static inline void tcg_gen_deposit_i64(TCGv_i64 ret, 
TCGv_i64 arg1,
 #define GET_TCGV_TL(t) GET_TCGV_I64(t)
 #endif
 
+#endif /* !DEBUG_TCGV_TL */
+
 #define TCGV_UNUSED(x) x = MAKE_TCGV_TL(-1)
 #define TCGV_EQUAL(a, b) (GET_TCGV_TL(a) == GET_TCGV_TL(b))
 
diff --git a/tcg/tcg.h b/tcg/tcg.h
index 175000f..01bf74b 100644
--- a/tcg/tcg.h
+++ b/tcg/tcg.h
@@ -189,6 +189,7 @@ typedef tcg_target_ulong TCGArg;
 
 #ifdef CONFIG_DEBUG_TCG
 #define DEBUG_TCGV 1
+//#define DEBUG_TCGV_TL
 #endif
 
 #ifdef DEBUG_TCGV
-- 
1.7.7




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