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[Qemu-devel] [PATCH v3 0/6] MIPS64 user mode emulation in QEMU with Cavi
From: |
khansa |
Subject: |
[Qemu-devel] [PATCH v3 0/6] MIPS64 user mode emulation in QEMU with Cavium specific instruction support |
Date: |
Sat, 22 Oct 2011 15:11:07 +0500 |
From: Khansa Butt <address@hidden>
This is the team work of Ehsan-ul-Haq, Abdul Qadeer, Abdul Waheed, Khansa Butt
from HPCN Lab KICS UET Lahore.
Sorry Richard! gen_set was missed.
v1 contains:
* SEQI and SEQ related changes specified by Richard Henderson
* Fix issues related to coding style, typos and misleading comments
* Cavium specific change in set_thread_area syscall has been removed
* as it corresponds to modified libc and kernel.
This Patch series add support of MIPS64 user mode emulation in QEMU.
Along with we implemented Cavium specific instructions which We will use
in SME (in sysem mode emulation of Octeon processor)
If you have any objection regarding the Implementation of
Cavium instructions please read following notes.
Notes
*****
The detail of some instructions are as follows
1)seq rd,rs,rt
seq-->rd = 1 if rs = rt
is equivalent to
xor rd,rs,rt
sltiu rd,rd,1
2)exts rt,rs,p,lenm1
rt = sign-extend(rs<p+lenm1:p>,lenm1)
>From reference manual of Cavium Networks
"Bit locations p + lenm1 to p are extracted from rs and the result is written
into the
lowest bits of destination register rt. The remaining bits in rt are a
sign-extension of
the most-significant bit of the bit field (i.e. rt<63:lenm1> are all duplicates
of the
source-register bit rs<p+lenm1>)." so we can't use any of 8,16 or 32 bit
sign extention tcg function. To sign extend according to msb of bit field
we have our own implementation
3)dmul rd,rs,rt
This instruction is included in gen_arith() because it is three operand
double word multiply instruction.
configure | 1 +
default-configs/mips64-linux-user.mak | 1 +
linux-user/main.c | 21 ++-
linux-user/mips64/syscall.h | 2 +
linux-user/signal.c | 438 ++++++++++++++++++++++++++++++++-
mips-dis.c | 53 ++++
target-mips/cpu.h | 7 +
target-mips/helper.h | 5 +
target-mips/machine.c | 12 +
target-mips/mips-defs.h | 2 +
target-mips/op_helper.c | 73 ++++++
target-mips/translate.c | 430 ++++++++++++++++++++++++++++++++-
target-mips/translate_init.c | 24 ++
13 files changed, 1049 insertions(+), 20 deletions(-)
create mode 100644 default-configs/mips64-linux-user.mak
--
1.7.3.4
- [Qemu-devel] [PATCH v3 0/6] MIPS64 user mode emulation in QEMU with Cavium specific instruction support,
khansa <=
- [Qemu-devel] [PATCH v3 1/6] linux-user:Support for MIPS64 user mode emulation in QEMU, khansa, 2011/10/22
- [Qemu-devel] [PATCH v3 2/6] target-mips:enabling of 64 bit user mode and floating point operations, khansa, 2011/10/22
- [Qemu-devel] [PATCH v3 3/6] linux-user:Signal handling for MIPS64, khansa, 2011/10/22
- [Qemu-devel] [PATCH v3 4/6] target-mips:Octeon cpu definition, khansa, 2011/10/22
- [Qemu-devel] [PATCH v3 5/6] target-mips: Adding support for Cavium specific instructions, khansa, 2011/10/22
- [Qemu-devel] [PATCH v3 6/6] Addition of Cavium instructions in disassembler, khansa, 2011/10/22
- Re: [Qemu-devel] [PATCH v3 0/6] MIPS64 user mode emulation in QEMU with Cavium specific instruction support, Andreas Färber, 2011/10/22