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Re: [Qemu-devel] [PATCH] target-alpha: Fix compilation errors for 32 bit
From: |
Blue Swirl |
Subject: |
Re: [Qemu-devel] [PATCH] target-alpha: Fix compilation errors for 32 bit hosts |
Date: |
Sun, 9 Oct 2011 08:20:53 +0000 |
Thanks, applied.
On Sun, Oct 9, 2011 at 6:50 AM, Stefan Weil <address@hidden> wrote:
> On i386, these errors were reported:
>
> qemu/hw/alpha_dp264.c: In function ‘clipper_init’:
> qemu/hw/alpha_dp264.c:158: error: integer constant is too large for ‘unsigned
> long’ type
>
> qemu/hw/alpha_typhoon.c: In function ‘typhoon_init’:
> qemu/hw/alpha_typhoon.c:737: error: integer constant is too large for ‘long’
> type
> qemu/hw/alpha_typhoon.c:741: error: integer constant is too large for ‘long’
> type
> qemu/hw/alpha_typhoon.c:745: error: integer constant is too large for ‘long’
> type
> qemu/hw/alpha_typhoon.c:749: error: integer constant is too large for ‘long’
> type
> qemu/hw/alpha_typhoon.c:757: error: integer constant is too large for ‘long’
> type
> qemu/hw/alpha_typhoon.c:767: error: integer constant is too large for ‘long’
> type
> qemu/hw/alpha_typhoon.c:772: error: integer constant is too large for ‘long’
> type
>
> Signed-off-by: Stefan Weil <address@hidden>
> ---
> hw/alpha_dp264.c | 2 +-
> hw/alpha_typhoon.c | 21 ++++++++++++++-------
> 2 files changed, 15 insertions(+), 8 deletions(-)
>
> diff --git a/hw/alpha_dp264.c b/hw/alpha_dp264.c
> index 7c36b21..fcc20e9 100644
> --- a/hw/alpha_dp264.c
> +++ b/hw/alpha_dp264.c
> @@ -155,7 +155,7 @@ static void clipper_init(ram_addr_t ram_size,
> load_image_targphys(initrd_filename, initrd_base,
> ram_size - initrd_base);
>
> - stq_phys(param_offset + 0x100, initrd_base +
> 0xfffffc0000000000UL);
> + stq_phys(param_offset + 0x100, initrd_base +
> 0xfffffc0000000000ULL);
> stq_phys(param_offset + 0x108, initrd_size);
> }
> }
> diff --git a/hw/alpha_typhoon.c b/hw/alpha_typhoon.c
> index c769fcc..c7608bb 100644
> --- a/hw/alpha_typhoon.c
> +++ b/hw/alpha_typhoon.c
> @@ -734,19 +734,23 @@ PCIBus *typhoon_init(ram_addr_t ram_size, qemu_irq
> *p_rtc_irq,
>
> /* Pchip0 CSRs, 0x801.8000.0000, 256MB. */
> memory_region_init_io(&s->pchip.region, &pchip_ops, s, "pchip0", 256*MB);
> - memory_region_add_subregion(addr_space, 0x80180000000, &s->pchip.region);
> + memory_region_add_subregion(addr_space, 0x80180000000ULL,
> + &s->pchip.region);
>
> /* Cchip CSRs, 0x801.A000.0000, 256MB. */
> memory_region_init_io(&s->cchip.region, &cchip_ops, s, "cchip0", 256*MB);
> - memory_region_add_subregion(addr_space, 0x801a0000000, &s->cchip.region);
> + memory_region_add_subregion(addr_space, 0x801a0000000ULL,
> + &s->cchip.region);
>
> /* Dchip CSRs, 0x801.B000.0000, 256MB. */
> memory_region_init_io(&s->dchip_region, &dchip_ops, s, "dchip0", 256*MB);
> - memory_region_add_subregion(addr_space, 0x801b0000000, &s->dchip_region);
> + memory_region_add_subregion(addr_space, 0x801b0000000ULL,
> + &s->dchip_region);
>
> /* Pchip0 PCI memory, 0x800.0000.0000, 4GB. */
> memory_region_init(&s->pchip.reg_mem, "pci0-mem", 4*GB);
> - memory_region_add_subregion(addr_space, 0x80000000000,
> &s->pchip.reg_mem);
> + memory_region_add_subregion(addr_space, 0x80000000000ULL,
> + &s->pchip.reg_mem);
>
> /* Pchip0 PCI I/O, 0x801.FC00.0000, 32MB. */
> /* ??? Ideally we drop the "system" i/o space on the floor and give the
> @@ -754,7 +758,8 @@ PCIBus *typhoon_init(ram_addr_t ram_size, qemu_irq
> *p_rtc_irq,
> We can't do that until the MEM and IO paths in memory.c are unified.
> */
> memory_region_init_io(&s->pchip.reg_io, &alpha_pci_bw_io_ops, NULL,
> "pci0-io", 32*MB);
> - memory_region_add_subregion(addr_space, 0x801fc000000, &s->pchip.reg_io);
> + memory_region_add_subregion(addr_space, 0x801fc000000ULL,
> + &s->pchip.reg_io);
>
> b = pci_register_bus(&s->host.busdev.qdev, "pci",
> typhoon_set_irq, sys_map_irq, s,
> @@ -764,12 +769,14 @@ PCIBus *typhoon_init(ram_addr_t ram_size, qemu_irq
> *p_rtc_irq,
> /* Pchip0 PCI special/interrupt acknowledge, 0x801.F800.0000, 64MB. */
> memory_region_init_io(&s->pchip.reg_iack, &alpha_pci_iack_ops, b,
> "pci0-iack", 64*MB);
> - memory_region_add_subregion(addr_space, 0x801f8000000,
> &s->pchip.reg_iack);
> + memory_region_add_subregion(addr_space, 0x801f8000000ULL,
> + &s->pchip.reg_iack);
>
> /* Pchip0 PCI configuration, 0x801.FE00.0000, 16MB. */
> memory_region_init_io(&s->pchip.reg_conf, &alpha_pci_conf1_ops, b,
> "pci0-conf", 16*MB);
> - memory_region_add_subregion(addr_space, 0x801fe000000,
> &s->pchip.reg_conf);
> + memory_region_add_subregion(addr_space, 0x801fe000000ULL,
> + &s->pchip.reg_conf);
>
> /* For the record, these are the mappings for the second PCI bus.
> We can get away with not implementing them because we indicate
> --
> 1.7.0.4
>
>
>