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Re: [Qemu-devel] pci_change_irq_level is broken...


From: Alan Amaral
Subject: Re: [Qemu-devel] pci_change_irq_level is broken...
Date: Wed, 21 Sep 2011 12:38:21 -0400

 
Excellent!  Thanks...
 
Alan

From: Jan Kiszka
Sent: Wed 9/21/2011 12:33 PM
To: Alan Amaral
Cc: address@hidden; address@hidden
Subject: Re: pci_change_irq_level is broken...

On 2011-09-21 18:26, Alan Amaral wrote:
>   
> 
> 
> 
> From: Jan Kiszka
> Sent: Tue 9/20/2011 3:41 PM
> To: Alan Amaral
> Cc: Richard Henderson; address@hidden
> Subject: Re: pci_change_irq_level is broken...
> 
>> On 2011-09-20 21:19, Alan Amaral wrote:
>>> QEMU emulator version 0.14.50, Copyright (c) 2003-2008 Fabrice Bellard
>>
>> (That's an ambitious development version.)
> 
> It's what we're using.
> 
>>>
>>> You are correct, it's not hardcoded to 4.  However, when it's allocated the number of elements IS 4.  Also,
>>> there's a comment just above pci_set_irq which says:
>>>
>>> /* 0 <= irq_num <= 3. level must be 0 or 1 */
>>> static void pci_set_irq(void *opaque, int irq_num, int level)
>>>
>>> so, that implies to me that it's probably always 4...  Sorry for the confusion.
>>
>> Assuming you look at PIIX3: Yes, it allocates 4 IRQs - but only returns
>> 0..3 via pci_slot_get_pirq. Xen uses some more, but also looks safe.
> 
> We are running under Xen and in this case it is using PIIX_NUM_PIRQS,
> which is 4, as the last arg to pci_bus_irqs().  
> 
> PCIBus *i440fx_xen_init(PCII440FXState **pi440fx_state, int *piix3_devfn,
>                         qemu_irq *pic, ram_addr_t ram_size)
> {
>     PCIBus *b;
>     b = i440fx_common_init("i440FX-xen", pi440fx_state, piix3_devfn, pic, ram_size);
>     pci_bus_irqs(b, xen_piix3_set_irq, xen_pci_slot_get_pirq,
>                  (*pi440fx_state)->piix3, PIIX_NUM_PIRQS);
>     return b;
> }

bf09551a6b, aka "xen: fix interrupt routing".

Jan


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