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[Qemu-devel] [PATCH 058/111] m68k: correctly compute divul
From: |
Bryce Lanham |
Subject: |
[Qemu-devel] [PATCH 058/111] m68k: correctly compute divul |
Date: |
Wed, 17 Aug 2011 15:47:03 -0500 |
From: Laurent Vivier <address@hidden>
Signed-off-by: Laurent Vivier <address@hidden>
---
target-m68k/op_helper.c | 28 +++++++++++++---------------
1 files changed, 13 insertions(+), 15 deletions(-)
diff --git a/target-m68k/op_helper.c b/target-m68k/op_helper.c
index d180c80..6c3144e 100644
--- a/target-m68k/op_helper.c
+++ b/target-m68k/op_helper.c
@@ -266,29 +266,27 @@ void HELPER(divu64)(CPUState *env)
{
uint32_t num;
uint32_t den;
- uint32_t quot;
+ uint64_t quot;
uint32_t rem;
uint32_t flags;
+ uint64_t quad;
num = env->div1;
den = env->div2;
/* ??? This needs to make sure the throwing location is accurate. */
if (den == 0)
raise_exception(EXCP_DIV0);
- quot = (num | ((uint64_t)env->quadh << 32)) / den;
- rem = (num | ((uint64_t)env->quadh << 32)) % den;
- flags = 0;
- /* Avoid using a PARAM1 of zero. This breaks dyngen because it uses
- the address of a symbol, and gcc knows symbols can't have address
- zero. */
- if (quot > 0xffffffff)
- flags |= CCF_V;
- if (quot == 0)
- flags |= CCF_Z;
- else if ((int32_t)quot < 0)
- flags |= CCF_N;
- /* Don't modify destination if overflow occured. */
- if ((flags & CCF_V) == 0) {
+ quad = num | ((uint64_t)env->quadh << 32);
+ quot = quad / den;
+ rem = quad % den;
+ if (quot > 0xffffffffULL) {
+ flags = (env->cc_dest & ~ CCF_C) | CCF_V;
+ } else {
+ flags = 0;
+ if (quot == 0)
+ flags |= CCF_Z;
+ else if ((int32_t)quot < 0)
+ flags |= CCF_N;
env->div1 = quot;
env->quadh = rem;
}
--
1.7.2.3
- Re: [Qemu-devel] [RFC][PATCH 000/111] QEMU m68k core additions, (continued)
- Re: [Qemu-devel] [RFC][PATCH 000/111] QEMU m68k core additions, Rob Landley, 2011/08/20
- Re: [Qemu-devel] [RFC][PATCH 000/111] QEMU m68k core additions, Rob Landley, 2011/08/20
- Re: [Qemu-devel] [RFC][PATCH 000/111] QEMU m68k core additions, Laurent Vivier, 2011/08/20
- Re: [Qemu-devel] [RFC][PATCH 000/111] QEMU m68k core additions, Rob Landley, 2011/08/20
- Re: [Qemu-devel] [RFC][PATCH 000/111] QEMU m68k core additions, Rob Landley, 2011/08/20
- Re: [Qemu-devel] [RFC][PATCH 000/111] QEMU m68k core additions, Rob Landley, 2011/08/20
[Qemu-devel] [PATCH 086/111] m68k: correct bfins instruction, Bryce Lanham, 2011/08/17
[Qemu-devel] [PATCH 025/111] m68k: add cas, Bryce Lanham, 2011/08/17
[Qemu-devel] [PATCH 067/111] m68k: add fscale, Bryce Lanham, 2011/08/17
[Qemu-devel] [PATCH 033/111] m68k: Add fmovecr, Bryce Lanham, 2011/08/17
[Qemu-devel] [PATCH 058/111] m68k: correctly compute divul,
Bryce Lanham <=
[Qemu-devel] [PATCH 069/111] m68k: add fetox and flogn, Bryce Lanham, 2011/08/17
[Qemu-devel] [PATCH 048/111] m68k: correct shift side effect for roxrl and roxll, Bryce Lanham, 2011/08/17
[Qemu-devel] [PATCH 065/111] m68k: correct compute gen_bitfield_cc(), Bryce Lanham, 2011/08/17
[Qemu-devel] [PATCH 049/111] m68k: asl/asr, clear C flag if shift count is 0, Bryce Lanham, 2011/08/17
[Qemu-devel] [PATCH 044/111] m68k: improve addx instructions Add (byte, word) opsize Add memory access, Bryce Lanham, 2011/08/17
[Qemu-devel] [PATCH 046/111] m68k: improve asl/asr evaluate correclty the missing V flag, Bryce Lanham, 2011/08/17
[Qemu-devel] [PATCH 023/111] m68k: add variable offset/width to bitfield_reg/bitfield_mem, Bryce Lanham, 2011/08/17
[Qemu-devel] [PATCH 081/111] m68k: correct fpcr update, Bryce Lanham, 2011/08/17
[Qemu-devel] [PATCH 063/111] m68k: some FPU debugging macros, Bryce Lanham, 2011/08/17
[Qemu-devel] [PATCH 066/111] m68k: add fgetexp, Bryce Lanham, 2011/08/17