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[Qemu-devel] [PATCH 111/111] m68k: move from sr can use effective addres
From: |
Bryce Lanham |
Subject: |
[Qemu-devel] [PATCH 111/111] m68k: move from sr can use effective addresse on m68k |
Date: |
Wed, 17 Aug 2011 15:54:16 -0500 |
From: Laurent Vivier <address@hidden>
---
target-m68k/translate.c | 8 +++-----
1 files changed, 3 insertions(+), 5 deletions(-)
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index b4b36f7..0be011e 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -3443,16 +3443,14 @@ DISAS_INSN(strldsr)
DISAS_INSN(move_from_sr)
{
- TCGv reg;
TCGv sr;
- if (IS_USER(s)) {
+ if (IS_USER(s)) { /* FIXME: not privileged on 68000 */
gen_exception(s, s->pc - 2, EXCP_PRIVILEGE);
return;
}
sr = gen_get_sr(s);
- reg = DREG(insn, 0);
- gen_partset_reg(OS_WORD, reg, sr);
+ DEST_EA(insn, OS_WORD, sr, NULL);
}
DISAS_INSN(move_to_sr)
@@ -4424,7 +4422,7 @@ void register_m68k_insns (CPUM68KState *env)
INSN(negx, 4000, ff00, M68000);
INSN(undef, 40c0, ffc0, M68000);
INSN(move_from_sr, 40c0, fff8, CF_ISA_A);
- INSN(move_from_sr, 40c0, fff8, M68000);
+ INSN(move_from_sr, 40c0, ffc0, M68000);
INSN(lea, 41c0, f1c0, CF_ISA_A);
INSN(lea, 41c0, f1c0, M68000);
INSN(clr, 4200, ff00, CF_ISA_A);
--
1.7.2.3
- [Qemu-devel] [PATCH 100/111] m68k: use log10l() to compute log10_FP0(), Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 104/111] m68k: add fsincos instruction, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 106/111] m68k: add ftanh instruction, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 111/111] m68k: move from sr can use effective addresse on m68k,
Bryce Lanham <=
- [Qemu-devel] [PATCH 109/111] m68k: first draft of q800 emulation (not working), Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 107/111] m68k: add flognp1 instruction, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 108/111] m68k: add fatanh instruction, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 102/111] m68k: add fcosh instruction, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 110/111] m68k: add movec instruction, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 103/111] m68k: add fasin instruction, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 101/111] m68k: correctly load signed word into floating point register, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 105/111] m68k: add fsinh instruction, Bryce Lanham, 2011/08/17