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[Qemu-devel] [PATCH 013/111] m68k: add Scc instruction with memory opera
From: |
Bryce Lanham |
Subject: |
[Qemu-devel] [PATCH 013/111] m68k: add Scc instruction with memory operand. |
Date: |
Wed, 17 Aug 2011 15:46:18 -0500 |
From: Laurent Vivier <address@hidden>
This patch defines Scc instruction for M68000 feature accessing
destination operand using an effective address (existing Scc instruction
manages only data registers).
Signed-off-by: Andreas Schwab <address@hidden>
Signed-off-by: Laurent Vivier <address@hidden>
---
target-m68k/translate.c | 18 ++++++++++++++++++
1 files changed, 18 insertions(+), 0 deletions(-)
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index ea92fd6..8cf49d8 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -903,6 +903,23 @@ static void gen_jmp_tb(DisasContext *s, int n, uint32_t
dest)
s->is_jmp = DISAS_TB_JUMP;
}
+DISAS_INSN(scc_mem)
+{
+ int l1;
+ int cond;
+ TCGv dest;
+
+ l1 = gen_new_label();
+ cond = (insn >> 8) & 0xf;
+ dest = tcg_temp_local_new();
+ tcg_gen_movi_i32(dest, 0);
+ gen_jmpcc(s, cond ^ 1, l1);
+ tcg_gen_movi_i32(dest, 0xff);
+ gen_set_label(l1);
+ DEST_EA(insn, OS_BYTE, dest, NULL);
+ tcg_temp_free(dest);
+}
+
DISAS_INSN(undef_mac)
{
gen_exception(s, s->pc - 2, EXCP_LINEA);
@@ -2972,6 +2989,7 @@ void register_m68k_insns (CPUM68KState *env)
INSN(addsubq, 5000, f080, M68000);
INSN(addsubq, 5080, f0c0, M68000);
INSN(scc, 50c0, f0f8, CF_ISA_A);
+ INSN(scc_mem, 50c0, f0c0, M68000);
INSN(scc, 50c0, f0f8, M68000);
INSN(tpf, 51f8, fff8, CF_ISA_A);
--
1.7.2.3
- [Qemu-devel] [PATCH 002/111] linux-user: add qemu-wrapper, (continued)
- [Qemu-devel] [PATCH 002/111] linux-user: add qemu-wrapper, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 003/111] linux-user: define default cpu model in configure instead of linux-user/main.c, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 004/111] linux-user: specify the cpu model during configure, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 006/111] linux-user: define new environment variables, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 007/111] linux-user: define a script to set binfmt using debian flavored tools, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 008/111] linux-user: define default cpu model in configure instead of linux-user/main.c, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 009/111] m68k: add tcg_gen_debug_insn_start(), Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 005/111] linux-user,m68k: display default cpu, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 010/111] m68k: define m680x0 CPUs and features, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 011/111] m68k: add missing accessing modes for some instructions., Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 013/111] m68k: add Scc instruction with memory operand.,
Bryce Lanham <=
- [Qemu-devel] [PATCH 012/111] m68k: add Motorola 680x0 family common instructions., Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 015/111] m68k: modify movem instruction to manage word, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 016/111] m68k: add 64bit divide., Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 014/111] m68k: add DBcc instruction., Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 018/111] m68k: add word data size for suba/adda, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 017/111] m68k: add 32bit and 64bit multiply, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 019/111] m68k: add fpu, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 020/111] m68k: add "byte", "word" and memory shift, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 022/111] m68k: add bitfield_mem, bitfield_reg, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 029/111] m68k: allow fpu to manage double data type with fmove to <ea>, Bryce Lanham, 2011/08/17