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Re: [Qemu-devel] [PATCH 0/7] SPARC64: fix nonfaulting load on softmmu


From: Blue Swirl
Subject: Re: [Qemu-devel] [PATCH 0/7] SPARC64: fix nonfaulting load on softmmu
Date: Thu, 21 Jul 2011 23:15:16 +0300

Thanks, applied all.

On Thu, Jul 21, 2011 at 6:16 PM, Tsuneo Saito <address@hidden> wrote:
> This patch series fixes nonfaulting load ASIs and traps related to them.
> According to "8.3.4 Non-Faulting Load" in the UltraSPARC-IIi User's Manual,
> a CPU should raise a TLB miss to the system software if the load is for
> unmapped area:
>  "When a non-faulting load encounters a TLB miss, the operating system
>  should attempt to translate the page. If the translation results in
>  an error (for example, address out of range), a 0 is returned and the
>  load completes silently."
>
> The first 4 patches are not directly related to nonfaulting load
> but are cleanups and fixes for preparing for the fix.  The next 2 patches
> fix the problem and the last one is for related faults other than
> the TLB miss.
>
> Tsuneo Saito (7):
>  SPARC64: TTE bits cleanup
>  SPARC64: SFSR cleanup and fix
>  SPARC64: introduce a convenience function for getting physical
>    addresses
>  SPARC64: split cpu_get_phys_page_debug() from
>    cpu_get_phys_page_nofault()
>  SPARC64: fix fault status overwritten on nonfaulting load
>  SPARC64: implement MMU miss traps on nonfaulting loads
>  SPARC64: implement addtional MMU faults related to nonfaulting load
>
>  target-sparc/cpu.h       |   35 +++++++++++
>  target-sparc/helper.c    |  149 
> ++++++++++++++++++++++++++++++++++------------
>  target-sparc/op_helper.c |   36 ++++++-----
>  3 files changed, 165 insertions(+), 55 deletions(-)
>
> --
> 1.7.5.4
>
>
>



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