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Re: [Qemu-devel] [PATCH 2/9] target-ppc: Handle memory-forced I/O contro
From: |
Alexander Graf |
Subject: |
Re: [Qemu-devel] [PATCH 2/9] target-ppc: Handle memory-forced I/O controller access |
Date: |
Sat, 18 Jun 2011 00:59:41 +0200 |
On 17.06.2011, at 21:34, Andreas Färber wrote:
> Am 17.06.2011 um 16:43 schrieb Alexander Graf:
>
>> From: Hervé Poussineau <address@hidden>
>>
>> On at least the PowerPC 601, a direct-store (T=1) with bus unit ID 0x07F
>> is special-cased as memory-forced I/O controller access. It is supposed
>> to be checked immediately if T=1, bypassing all protection mechanisms
>> and acting cache-inhibited and global.
>>
>> Signed-off-by: Hervé Poussineau <address@hidden>
>>
>> Simplified by avoiding reindentation. Added explanatory comments.
>>
>> Cc: Alexander Graf <address@hidden>
>> Signed-off-by: Andreas Färber <address@hidden>
>> Signed-off-by: Alexander Graf <address@hidden>
>
> Feel free to remove the Cc: after adding a corresponding Sob or similar line.
Hrm - I usually just use git am -s for the sob line. If you find the CC
irritating, please just pass it to git send-email --cc and omit it from the
patch. It's more or less unuseful information anyways :)
Alex
[Qemu-devel] [PATCH 8/9] PPC: 440: Use 440 style MMU as default, so Qemu knows the MMU type, Alexander Graf, 2011/06/17
[Qemu-devel] [PATCH 1/9] PPC: E500: Implement reboot controller, Alexander Graf, 2011/06/17
[Qemu-devel] [PATCH 9/9] PPC: move TLBs to their own arrays, Alexander Graf, 2011/06/17
[Qemu-devel] [PATCH 4/9] PPC: mpc8544ds: Add hypervisor node, Alexander Graf, 2011/06/17
[Qemu-devel] [PATCH 6/9] PPC: Only set lower 32bits with mtmsr, Alexander Graf, 2011/06/17
[Qemu-devel] [PATCH 3/9] PPC: calculate kernel, initrd, cmdline locations dynamically, Alexander Graf, 2011/06/17
[Qemu-devel] [PATCH 7/9] PPC: E500: Use MAS registers instead of internal TLB representation, Alexander Graf, 2011/06/17
[Qemu-devel] [PATCH 5/9] PPC: update openbios firmware, Alexander Graf, 2011/06/17