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Re: [Qemu-devel] [PATCH 1/3] Add ppc_init_cacheline_sizes() function for


From: Brad
Subject: Re: [Qemu-devel] [PATCH 1/3] Add ppc_init_cacheline_sizes() function for OpenBSD.
Date: Sun, 29 May 2011 12:56:35 -0400
User-agent: Mozilla/5.0 (Macintosh; U; PPC Mac OS X 10.5; en-US; rv:1.9.2.17) Gecko/20110414 Thunderbird/3.1.10

On 26/05/11 8:20 PM, malc wrote:
On Thu, 26 May 2011, Brad wrote:

On 26/05/11 9:15 AM, malc wrote:
On Thu, 26 May 2011, Brad wrote:

----- Original message -----
On Wed, 25 May 2011, Brad wrote:

Add ppc_init_cacheline_sizes() function for OpenBSD to fix compilation
of PowerPC host support for OpenBSD/powerpc based architectures.

Signed-off-by: Brad Smith<address@hidden>


[..snip..]


Well this is the behavior of our kernel no matter what the CPU type is.

from sys/arch/powerpc/cpu.h..


#define CACHELINE       32              /* Note that this value is really
hardwired */


[..snip..]

I sure hope that OpenBSD doesn't use this value for dcbz/a's on ppc's with
less than 32 bytes per cache line and am not sure i want to take this
patch even if the kernel itself does this, not without some nagging printf
in the init cache line function urging OpenBSD kernel developers to fix
things..

USE_DCBZ is not defined.

/*
 * Fill the given physical page with zeros.
 */
void
pmap_zero_page(struct vm_page *pg)
{
        paddr_t pa = VM_PAGE_TO_PHYS(pg);
#ifdef USE_DCBZ
        int i;
        paddr_t addr = zero_page;
#endif

        /* simple_lock(&pmap_zero_page_lock); */
        pmap_kenter_pa(zero_page, pa, VM_PROT_READ|VM_PROT_WRITE);
#ifdef USE_DCBZ
        for (i = PAGE_SIZE/CACHELINESIZE; i>0; i--) {
                __asm volatile ("dcbz 0,%0" :: "r"(addr));
                addr += CACHELINESIZE;
        }
#else
        bzero((void *)zero_page, PAGE_SIZE);
#endif
        pmap_kremove_pg(zero_page);
        
        /* simple_unlock(&pmap_zero_page_lock); */
}

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