[Top][All Lists]
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH 11/26] target-alpha: Tidy exception constants.
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 11/26] target-alpha: Tidy exception constants. |
Date: |
Mon, 23 May 2011 13:28:31 -0700 |
There's no need to attempt to match EXCP_* values with PALcode entry
point offsets. Instead, compress all the values to make for more
efficient switch statements within QEMU.
We will be doing TLB fill within QEMU proper, not within the PALcode,
so all of the ITB/DTB miss, double fault, and access exceptions can
be compressed to EXCP_MMFAULT.
Compress all of the EXCP_CALL_PAL exceptions into one.
Use env->error_code to store the specific entry point.
Signed-off-by: Richard Henderson <address@hidden>
---
linux-user/main.c | 44 ++++++++++++++------------------------------
target-alpha/cpu.h | 34 ++++++++++++++--------------------
target-alpha/helper.c | 5 +----
target-alpha/translate.c | 4 ++--
4 files changed, 31 insertions(+), 56 deletions(-)
diff --git a/linux-user/main.c b/linux-user/main.c
index 1c985ab..1b17261 100644
--- a/linux-user/main.c
+++ b/linux-user/main.c
@@ -2508,19 +2508,13 @@ void cpu_loop (CPUState *env)
fprintf(stderr, "Machine check exception. Exit\n");
exit(1);
break;
- case EXCP_ARITH:
- env->lock_addr = -1;
- info.si_signo = TARGET_SIGFPE;
- info.si_errno = 0;
- info.si_code = TARGET_FPE_FLTINV;
- info._sifields._sigfault._addr = env->pc;
- queue_signal(env, info.si_signo, &info);
- break;
- case EXCP_HW_INTERRUPT:
+ case EXCP_SMP_INTERRUPT:
+ case EXCP_CLK_INTERRUPT:
+ case EXCP_DEV_INTERRUPT:
fprintf(stderr, "External interrupt. Exit\n");
exit(1);
break;
- case EXCP_DFAULT:
+ case EXCP_MMFAULT:
env->lock_addr = -1;
info.si_signo = TARGET_SIGSEGV;
info.si_errno = 0;
@@ -2529,22 +2523,6 @@ void cpu_loop (CPUState *env)
info._sifields._sigfault._addr = env->trap_arg0;
queue_signal(env, info.si_signo, &info);
break;
- case EXCP_DTB_MISS_PAL:
- fprintf(stderr, "MMU data TLB miss in PALcode\n");
- exit(1);
- break;
- case EXCP_ITB_MISS:
- fprintf(stderr, "MMU instruction TLB miss\n");
- exit(1);
- break;
- case EXCP_ITB_ACV:
- fprintf(stderr, "MMU instruction access violation\n");
- exit(1);
- break;
- case EXCP_DTB_MISS_NATIVE:
- fprintf(stderr, "MMU data TLB miss\n");
- exit(1);
- break;
case EXCP_UNALIGN:
env->lock_addr = -1;
info.si_signo = TARGET_SIGBUS;
@@ -2562,12 +2540,20 @@ void cpu_loop (CPUState *env)
info._sifields._sigfault._addr = env->pc;
queue_signal(env, info.si_signo, &info);
break;
+ case EXCP_ARITH:
+ env->lock_addr = -1;
+ info.si_signo = TARGET_SIGFPE;
+ info.si_errno = 0;
+ info.si_code = TARGET_FPE_FLTINV;
+ info._sifields._sigfault._addr = env->pc;
+ queue_signal(env, info.si_signo, &info);
+ break;
case EXCP_FEN:
/* No-op. Linux simply re-enables the FPU. */
break;
- case EXCP_CALL_PAL ... (EXCP_CALL_PALP - 1):
+ case EXCP_CALL_PAL:
env->lock_addr = -1;
- switch ((trapnr >> 6) | 0x80) {
+ switch (env->error_code) {
case 0x80:
/* BPT */
info.si_signo = TARGET_SIGTRAP;
@@ -2658,8 +2644,6 @@ void cpu_loop (CPUState *env)
goto do_sigill;
}
break;
- case EXCP_CALL_PALP ... (EXCP_CALL_PALE - 1):
- goto do_sigill;
case EXCP_DEBUG:
info.si_signo = gdb_handlesig (env, TARGET_SIGTRAP);
if (info.si_signo) {
diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h
index be7d151..01e3741 100644
--- a/target-alpha/cpu.h
+++ b/target-alpha/cpu.h
@@ -289,26 +289,20 @@ enum {
};
enum {
- EXCP_RESET = 0x0000,
- EXCP_MCHK = 0x0020,
- EXCP_ARITH = 0x0060,
- EXCP_HW_INTERRUPT = 0x00E0,
- EXCP_DFAULT = 0x01E0,
- EXCP_DTB_MISS_PAL = 0x09E0,
- EXCP_ITB_MISS = 0x03E0,
- EXCP_ITB_ACV = 0x07E0,
- EXCP_DTB_MISS_NATIVE = 0x08E0,
- EXCP_UNALIGN = 0x11E0,
- EXCP_OPCDEC = 0x13E0,
- EXCP_FEN = 0x17E0,
- EXCP_CALL_PAL = 0x2000,
- EXCP_CALL_PALP = 0x3000,
- EXCP_CALL_PALE = 0x4000,
- /* Pseudo exception for console */
- EXCP_CONSOLE_DISPATCH = 0x4001,
- EXCP_CONSOLE_FIXUP = 0x4002,
- EXCP_STL_C = 0x4003,
- EXCP_STQ_C = 0x4004,
+ EXCP_RESET,
+ EXCP_MCHK,
+ EXCP_SMP_INTERRUPT,
+ EXCP_CLK_INTERRUPT,
+ EXCP_DEV_INTERRUPT,
+ EXCP_MMFAULT,
+ EXCP_UNALIGN,
+ EXCP_OPCDEC,
+ EXCP_ARITH,
+ EXCP_FEN,
+ EXCP_CALL_PAL,
+ /* For Usermode emulation. */
+ EXCP_STL_C,
+ EXCP_STQ_C,
};
/* Arithmetic exception */
diff --git a/target-alpha/helper.c b/target-alpha/helper.c
index 5c3263b..c5479fd 100644
--- a/target-alpha/helper.c
+++ b/target-alpha/helper.c
@@ -164,10 +164,7 @@ void cpu_alpha_store_fpcr (CPUState *env, uint64_t val)
int cpu_alpha_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
int mmu_idx, int is_softmmu)
{
- if (rw == 2)
- env->exception_index = EXCP_ITB_MISS;
- else
- env->exception_index = EXCP_DFAULT;
+ env->exception_index = EXCP_MMFAULT;
env->trap_arg0 = address;
return 1;
}
diff --git a/target-alpha/translate.c b/target-alpha/translate.c
index fe0ae96..5f40d34 100644
--- a/target-alpha/translate.c
+++ b/target-alpha/translate.c
@@ -1516,7 +1516,7 @@ static ExitStatus translate_one(DisasContext *ctx,
uint32_t insn)
#endif
if (palcode >= 0x80 && palcode < 0xC0) {
/* Unprivileged PAL call */
- ret = gen_excp(ctx, EXCP_CALL_PAL + ((palcode & 0x3F) << 6), 0);
+ ret = gen_excp(ctx, EXCP_CALL_PAL, palcode & 0xBF);
break;
}
#ifndef CONFIG_USER_ONLY
@@ -1525,7 +1525,7 @@ static ExitStatus translate_one(DisasContext *ctx,
uint32_t insn)
if (ctx->mem_idx != MMU_KERNEL_IDX) {
goto invalid_opc;
}
- ret = gen_excp(ctx, EXCP_CALL_PALP + ((palcode & 0x3F) << 6), 0);
+ ret = gen_excp(ctx, EXCP_CALL_PAL, palcode & 0x3F);
}
#endif
/* Invalid PAL call */
--
1.7.4.4
- [Qemu-devel] [PATCH 07/26] target-alpha: Cleanup MMU modes., (continued)
- [Qemu-devel] [PATCH 07/26] target-alpha: Cleanup MMU modes., Richard Henderson, 2011/05/23
- [Qemu-devel] [PATCH 05/26] target-alpha: Fix translation of PALmode memory insns., Richard Henderson, 2011/05/23
- [Qemu-devel] [PATCH 09/26] target-alpha: Rationalize internal processor registers., Richard Henderson, 2011/05/23
- [Qemu-devel] [PATCH 12/26] target-alpha: Tidy up arithmetic exceptions., Richard Henderson, 2011/05/23
- [Qemu-devel] [PATCH 13/26] target-alpha: Use do_restore_state for arithmetic exceptions., Richard Henderson, 2011/05/23
- [Qemu-devel] [PATCH 15/26] target-alpha: Use kernel mmu_idx for pal_mode., Richard Henderson, 2011/05/23
- [Qemu-devel] [PATCH 14/26] target-alpha: Add various symbolic constants., Richard Henderson, 2011/05/23
- [Qemu-devel] [PATCH 10/26] target-alpha: Enable the alpha-softmmu target., Richard Henderson, 2011/05/23
- [Qemu-devel] [PATCH 16/26] target-alpha: Add IPRs to be used by the emulation PALcode., Richard Henderson, 2011/05/23
- [Qemu-devel] [PATCH 17/26] target-alpha: Implement do_interrupt for system mode., Richard Henderson, 2011/05/23
- [Qemu-devel] [PATCH 11/26] target-alpha: Tidy exception constants.,
Richard Henderson <=
- [Qemu-devel] [PATCH 18/26] target-alpha: Swap shadow registers moving to/from PALmode., Richard Henderson, 2011/05/23
- [Qemu-devel] [PATCH 20/26] target-alpha: Disable interrupts properly., Richard Henderson, 2011/05/23
- [Qemu-devel] [PATCH 19/26] target-alpha: All ISA checks to use TB->FLAGS., Richard Henderson, 2011/05/23
- [Qemu-devel] [PATCH 21/26] target-alpha: Implement more CALL_PAL values inline., Richard Henderson, 2011/05/23
- [Qemu-devel] [PATCH 22/26] target-alpha: Implement cpu_alpha_handle_mmu_fault for system mode., Richard Henderson, 2011/05/23
- [Qemu-devel] [PATCH 23/26] target-alpha: Remap PIO space for 43-bit KSEG for EV6., Richard Henderson, 2011/05/23
- [Qemu-devel] [PATCH 24/26] target-alpha: Trap for unassigned and unaligned addresses., Richard Henderson, 2011/05/23
- [Qemu-devel] [PATCH 25/26] target-alpha: Use a fixed frequency for the RPCC in system mode., Richard Henderson, 2011/05/23
- [Qemu-devel] [PATCH 26/26] target-alpha: Implement TLB flush primitives., Richard Henderson, 2011/05/23
- Re: [Qemu-devel] [PULL 00/26] Alpha system emulation, v5, Richard Henderson, 2011/05/27