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Re: [Qemu-devel] [PATCH 5/7] PPC: Implement e500 (FSL) MMU
From: |
Alexander Graf |
Subject: |
Re: [Qemu-devel] [PATCH 5/7] PPC: Implement e500 (FSL) MMU |
Date: |
Mon, 9 May 2011 21:36:12 +0200 |
On 09.05.2011, at 21:27, Scott Wood wrote:
> On Sat, 7 May 2011 23:36:29 +0200
> Alexander Graf <address@hidden> wrote:
>
>> On 07.05.2011, at 00:25, Scott Wood wrote:
>>>> +void helper_booke206_tlbsx(target_ulong address_hi, target_ulong
>>>> address_lo)
>>>
>>> What is address_hi?
>>>
>>> From gen_tlbsx_booke206() it looks like these two arguments correspond to
>>> the two operands, so shouldn't they be added together? I only see
>>> address_lo used.
>>
>> Yup. According to the e500 spec:
>>
>> Note that rA = 0 is the preferred form for tlbsx and that some Freescale
>> implementations, such as the e500, take an illegal instruction exception
>> program interrupt if rA!=0.
>>
>> So I figured that we're architecturally close enough if we just ignore it
>> for now :).
>
> Architecturally, ignoring it and taking a trap are significantly
> different. :-)
>
> In practice it won't matter much, but it seems simple to handle it (why
> handle it in tlbivax but not here?), especially if this is to be general
> book3e code rather than e500. I'm still confused about the "address_hi/lo"
> naming.
So what would you prefer? Just do whatever the 2.06 spec says and ignore e500
specifics? :) Or always do what the e500 spec says?
Alex
- [Qemu-devel] [PATCH 6/7] PPC MPC7544DS: Use new TLB helper function, (continued)
- [Qemu-devel] [PATCH 6/7] PPC MPC7544DS: Use new TLB helper function, Alexander Graf, 2011/05/06
- [Qemu-devel] [PATCH 2/7] PPC: Make MPC8544DS emulation work w/o KVM, Alexander Graf, 2011/05/06
- [Qemu-devel] [PATCH 7/7] PPC: Qdev'ify e500 pci, Alexander Graf, 2011/05/06
- [Qemu-devel] [PATCH 4/7] PPC: Add another 64 bits to instruction feature mask, Alexander Graf, 2011/05/06
- [Qemu-devel] [PATCH 5/7] PPC: Implement e500 (FSL) MMU, Alexander Graf, 2011/05/06