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[Qemu-devel] [PATCH 21/33] target-alpha: Disable interrupts properly.
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 21/33] target-alpha: Disable interrupts properly. |
Date: |
Thu, 28 Apr 2011 13:51:03 -0700 |
Interrupts are disabled in PALmode, and when the PS IL is high enough.
Signed-off-by: Richard Henderson <address@hidden>
---
cpu-exec.c | 28 +++++++++++++++++++++++++---
target-alpha/exec.h | 11 ++++++++++-
2 files changed, 35 insertions(+), 4 deletions(-)
diff --git a/cpu-exec.c b/cpu-exec.c
index e1b85d6..f22ac7f 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -532,9 +532,31 @@ int cpu_exec(CPUState *env1)
next_tb = 0;
}
#elif defined(TARGET_ALPHA)
- if (interrupt_request & CPU_INTERRUPT_HARD) {
- do_interrupt(env);
- next_tb = 0;
+ {
+ int idx = -1;
+ /* ??? This hard-codes the OSF/1 interrupt levels. */
+ switch (env->pal_mode ? 7 : env->ps & PS_INT_MASK) {
+ case 0 ... 3:
+ if (interrupt_request & CPU_INTERRUPT_HARD) {
+ idx = EXCP_DEV_INTERRUPT;
+ }
+ /* FALLTHRU */
+ case 4:
+ if (interrupt_request & CPU_INTERRUPT_TIMER) {
+ idx = EXCP_CLK_INTERRUPT;
+ }
+ /* FALLTHRU */
+ case 5:
+ if (interrupt_request & CPU_INTERRUPT_SMI) {
+ idx = EXCP_SMP_INTERRUPT;
+ }
+ }
+ if (idx >= 0) {
+ env->exception_index = idx;
+ env->error_code = 0;
+ do_interrupt(env);
+ next_tb = 0;
+ }
}
#elif defined(TARGET_CRIS)
if (interrupt_request & CPU_INTERRUPT_HARD
diff --git a/target-alpha/exec.h b/target-alpha/exec.h
index 6ae96d1..adf835e 100644
--- a/target-alpha/exec.h
+++ b/target-alpha/exec.h
@@ -39,7 +39,16 @@ register struct CPUAlphaState *env asm(AREG0);
static inline int cpu_has_work(CPUState *env)
{
- return (env->interrupt_request & CPU_INTERRUPT_HARD);
+ /* Here we are checking to see if the CPU should wake up from HALT.
+ We will have gotten into this state only for WTINT from PALmode. */
+ /* ??? I'm not sure how the IPL state works with WTINT to keep a CPU
+ asleep even if (some) interrupts have been asserted. For now,
+ assume that if a CPU really wants to stay asleep, it will mask
+ interrupts at the chipset level, which will prevent these bits
+ from being set in the first place. */
+ return env->interrupt_request & (CPU_INTERRUPT_HARD
+ | CPU_INTERRUPT_TIMER
+ | CPU_INTERRUPT_SMI);
}
static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb)
--
1.7.4.4
- [Qemu-devel] [PATCH 09/33] target-alpha: Rationalize internal processor registers., (continued)
- [Qemu-devel] [PATCH 09/33] target-alpha: Rationalize internal processor registers., Richard Henderson, 2011/04/28
- [Qemu-devel] [PATCH 11/33] target-alpha: Fixup translation of PALmode instructions., Richard Henderson, 2011/04/28
- [Qemu-devel] [PATCH 13/33] target-alpha: Tidy up arithmetic exceptions., Richard Henderson, 2011/04/28
- [Qemu-devel] [PATCH 14/33] target-alpha: Use do_restore_state for arithmetic exceptions., Richard Henderson, 2011/04/28
- [Qemu-devel] [PATCH 15/33] target-alpha: Merge HW_REI and HW_RET implementations., Richard Henderson, 2011/04/28
- [Qemu-devel] [PATCH 12/33] target-alpha: Add IPRs to be used by the emulation PALcode., Richard Henderson, 2011/04/28
- [Qemu-devel] [PATCH 16/33] target-alpha: Implement do_interrupt for system mode., Richard Henderson, 2011/04/28
- [Qemu-devel] [PATCH 17/33] target-alpha: Swap shadow registers moving to/from PALmode., Richard Henderson, 2011/04/28
- [Qemu-devel] [PATCH 19/33] target-alpha: Use kernel mmu_idx for pal_mode., Richard Henderson, 2011/04/28
- [Qemu-devel] [PATCH 18/33] target-alpha: Add various symbolic constants., Richard Henderson, 2011/04/28
- [Qemu-devel] [PATCH 21/33] target-alpha: Disable interrupts properly.,
Richard Henderson <=
- [Qemu-devel] [PATCH 20/33] target-alpha: All ISA checks to use TB->FLAGS., Richard Henderson, 2011/04/28
- [Qemu-devel] [PATCH 22/33] target-alpha: Implement more CALL_PAL values inline., Richard Henderson, 2011/04/28
- [Qemu-devel] [PATCH 23/33] target-alpha: Implement cpu_alpha_handle_mmu_fault for system mode., Richard Henderson, 2011/04/28
- [Qemu-devel] [PATCH 24/33] target-alpha: Remap PIO space for 43-bit KSEG for EV6., Richard Henderson, 2011/04/28
- [Qemu-devel] [PATCH 25/33] target-alpha: Trap for unassigned and unaligned addresses., Richard Henderson, 2011/04/28
- [Qemu-devel] [PATCH 26/33] target-alpha: Include the PCC_OFS in the RPCC return value., Richard Henderson, 2011/04/28
- [Qemu-devel] [PATCH 27/33] target-alpha: Use a fixed frequency for the RPCC in system mode., Richard Henderson, 2011/04/28
- [Qemu-devel] [PATCH 28/33] target-alpha: Implement TLB flush primitives., Richard Henderson, 2011/04/28
- [Qemu-devel] [PATCH 31/33] target-alpha: Implement WAIT IPR., Richard Henderson, 2011/04/28
- [Qemu-devel] [PATCH 32/33] target-alpha: Implement HALT IPR., Richard Henderson, 2011/04/28