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[Qemu-devel] [PATCH 05/24] target-alpha: Tidy exception constants.
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 05/24] target-alpha: Tidy exception constants. |
Date: |
Tue, 19 Apr 2011 08:04:42 -0700 |
There's no need to attempt to match EXCP_* values with PALcode entry
point offsets. Instead, compress all the values to make for more
efficient switch statements within QEMU.
We will be doing TLB fill within QEMU proper, not within the PALcode,
so all of the ITB/DTB miss, double fault, and access exceptions can
be compressed to EXCP_MMFAULT.
Compress all of the EXCP_CALL_PAL exceptions into one.
Use env->error_code to store the specific entry point.
Signed-off-by: Richard Henderson <address@hidden>
---
linux-user/main.c | 43 +++++++++++++------------------------------
target-alpha/cpu.h | 33 +++++++++++++--------------------
target-alpha/helper.c | 6 +-----
target-alpha/translate.c | 4 ++--
4 files changed, 29 insertions(+), 57 deletions(-)
diff --git a/linux-user/main.c b/linux-user/main.c
index a1e37e4..5b25736 100644
--- a/linux-user/main.c
+++ b/linux-user/main.c
@@ -2526,19 +2526,12 @@ void cpu_loop (CPUState *env)
fprintf(stderr, "Machine check exception. Exit\n");
exit(1);
break;
- case EXCP_ARITH:
- env->lock_addr = -1;
- info.si_signo = TARGET_SIGFPE;
- info.si_errno = 0;
- info.si_code = TARGET_FPE_FLTINV;
- info._sifields._sigfault._addr = env->pc;
- queue_signal(env, info.si_signo, &info);
- break;
- case EXCP_HW_INTERRUPT:
+ case EXCP_CLK_INTERRUPT:
+ case EXCP_DEV_INTERRUPT:
fprintf(stderr, "External interrupt. Exit\n");
exit(1);
break;
- case EXCP_DFAULT:
+ case EXCP_MMFAULT:
env->lock_addr = -1;
info.si_signo = TARGET_SIGSEGV;
info.si_errno = 0;
@@ -2547,22 +2540,6 @@ void cpu_loop (CPUState *env)
info._sifields._sigfault._addr = env->ipr[IPR_EXC_ADDR];
queue_signal(env, info.si_signo, &info);
break;
- case EXCP_DTB_MISS_PAL:
- fprintf(stderr, "MMU data TLB miss in PALcode\n");
- exit(1);
- break;
- case EXCP_ITB_MISS:
- fprintf(stderr, "MMU instruction TLB miss\n");
- exit(1);
- break;
- case EXCP_ITB_ACV:
- fprintf(stderr, "MMU instruction access violation\n");
- exit(1);
- break;
- case EXCP_DTB_MISS_NATIVE:
- fprintf(stderr, "MMU data TLB miss\n");
- exit(1);
- break;
case EXCP_UNALIGN:
env->lock_addr = -1;
info.si_signo = TARGET_SIGBUS;
@@ -2580,12 +2557,20 @@ void cpu_loop (CPUState *env)
info._sifields._sigfault._addr = env->pc;
queue_signal(env, info.si_signo, &info);
break;
+ case EXCP_ARITH:
+ env->lock_addr = -1;
+ info.si_signo = TARGET_SIGFPE;
+ info.si_errno = 0;
+ info.si_code = TARGET_FPE_FLTINV;
+ info._sifields._sigfault._addr = env->pc;
+ queue_signal(env, info.si_signo, &info);
+ break;
case EXCP_FEN:
/* No-op. Linux simply re-enables the FPU. */
break;
- case EXCP_CALL_PAL ... (EXCP_CALL_PALP - 1):
+ case EXCP_CALL_PAL:
env->lock_addr = -1;
- switch ((trapnr >> 6) | 0x80) {
+ switch (env->error_code) {
case 0x80:
/* BPT */
info.si_signo = TARGET_SIGTRAP;
@@ -2676,8 +2661,6 @@ void cpu_loop (CPUState *env)
goto do_sigill;
}
break;
- case EXCP_CALL_PALP ... (EXCP_CALL_PALE - 1):
- goto do_sigill;
case EXCP_DEBUG:
info.si_signo = gdb_handlesig (env, TARGET_SIGTRAP);
if (info.si_signo) {
diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h
index 0daa556..f3e939b 100644
--- a/target-alpha/cpu.h
+++ b/target-alpha/cpu.h
@@ -391,26 +391,19 @@ enum {
};
enum {
- EXCP_RESET = 0x0000,
- EXCP_MCHK = 0x0020,
- EXCP_ARITH = 0x0060,
- EXCP_HW_INTERRUPT = 0x00E0,
- EXCP_DFAULT = 0x01E0,
- EXCP_DTB_MISS_PAL = 0x09E0,
- EXCP_ITB_MISS = 0x03E0,
- EXCP_ITB_ACV = 0x07E0,
- EXCP_DTB_MISS_NATIVE = 0x08E0,
- EXCP_UNALIGN = 0x11E0,
- EXCP_OPCDEC = 0x13E0,
- EXCP_FEN = 0x17E0,
- EXCP_CALL_PAL = 0x2000,
- EXCP_CALL_PALP = 0x3000,
- EXCP_CALL_PALE = 0x4000,
- /* Pseudo exception for console */
- EXCP_CONSOLE_DISPATCH = 0x4001,
- EXCP_CONSOLE_FIXUP = 0x4002,
- EXCP_STL_C = 0x4003,
- EXCP_STQ_C = 0x4004,
+ EXCP_RESET,
+ EXCP_MCHK,
+ EXCP_CLK_INTERRUPT,
+ EXCP_DEV_INTERRUPT,
+ EXCP_MMFAULT,
+ EXCP_UNALIGN,
+ EXCP_OPCDEC,
+ EXCP_ARITH,
+ EXCP_FEN,
+ EXCP_CALL_PAL,
+ /* For Usermode emulation. */
+ EXCP_STL_C,
+ EXCP_STQ_C,
};
/* Arithmetic exception */
diff --git a/target-alpha/helper.c b/target-alpha/helper.c
index f7cf4ee..676c870 100644
--- a/target-alpha/helper.c
+++ b/target-alpha/helper.c
@@ -164,12 +164,8 @@ void cpu_alpha_store_fpcr (CPUState *env, uint64_t val)
int cpu_alpha_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
int mmu_idx, int is_softmmu)
{
- if (rw == 2)
- env->exception_index = EXCP_ITB_MISS;
- else
- env->exception_index = EXCP_DFAULT;
+ env->exception_index = EXCP_MMFAULT;
env->ipr[IPR_EXC_ADDR] = address;
-
return 1;
}
diff --git a/target-alpha/translate.c b/target-alpha/translate.c
index 699c70d..3a023a5 100644
--- a/target-alpha/translate.c
+++ b/target-alpha/translate.c
@@ -1512,7 +1512,7 @@ static ExitStatus translate_one(DisasContext *ctx,
uint32_t insn)
#endif
if (palcode >= 0x80 && palcode < 0xC0) {
/* Unprivileged PAL call */
- ret = gen_excp(ctx, EXCP_CALL_PAL + ((palcode & 0x3F) << 6), 0);
+ ret = gen_excp(ctx, EXCP_CALL_PAL, palcode & 0xBF);
break;
}
#ifndef CONFIG_USER_ONLY
@@ -1520,7 +1520,7 @@ static ExitStatus translate_one(DisasContext *ctx,
uint32_t insn)
/* Privileged PAL code */
if (ctx->mem_idx & 1)
goto invalid_opc;
- ret = gen_excp(ctx, EXCP_CALL_PALP + ((palcode & 0x3F) << 6), 0);
+ ret = gen_excp(ctx, EXCP_CALL_PAL, palcode & 0x3F);
}
#endif
/* Invalid PAL call */
--
1.7.3.4
- [Qemu-devel] [PATCH 00/24] Alpha system emulation, v2, Richard Henderson, 2011/04/19
- [Qemu-devel] [PATCH 21/24] target-alpha: Include the PCC_OFS in the RPCC return value., Richard Henderson, 2011/04/19
- [Qemu-devel] [PATCH 10/24] target-alpha: Tidy up arithmetic exceptions., Richard Henderson, 2011/04/19
- [Qemu-devel] [PATCH 09/24] target-alpha: Add IPRs to be used by the emulation PALcode., Richard Henderson, 2011/04/19
- [Qemu-devel] [PATCH 22/24] target-alpha: Implement TLB flush primitives., Richard Henderson, 2011/04/19
- [Qemu-devel] [PATCH 19/24] target-alpha: Implement cpu_alpha_handle_mmu_fault for system mode., Richard Henderson, 2011/04/19
- [Qemu-devel] [PATCH 05/24] target-alpha: Tidy exception constants.,
Richard Henderson <=
- [Qemu-devel] [PATCH 17/24] target-alpha: Implement more CALL_PAL values inline., Richard Henderson, 2011/04/19
- [Qemu-devel] [PATCH 11/24] target-alpha: Merge HW_REI and HW_RET implementations., Richard Henderson, 2011/04/19
- [Qemu-devel] [PATCH 24/24] target-alpha: Add SX164 emulation., Richard Henderson, 2011/04/19
- [Qemu-devel] [PATCH 15/24] target-alpha: All ISA checks to use TB->FLAGS., Richard Henderson, 2011/04/19
- [Qemu-devel] [PATCH 03/24] pci: Export pci_to_cpu_addr., Richard Henderson, 2011/04/19
- [Qemu-devel] [PATCH 14/24] target-alpha: Add various symbolic constants., Richard Henderson, 2011/04/19
- [Qemu-devel] [PATCH 12/24] target-alpha: Implement do_interrupt for system mode., Richard Henderson, 2011/04/19
- [Qemu-devel] [PATCH 01/24] Export the unassigned_mem read/write functions., Richard Henderson, 2011/04/19
- [Qemu-devel] [PATCH 23/24] target-alpha: Enable the alpha-softmmu target., Richard Henderson, 2011/04/19
- [Qemu-devel] [PATCH 16/24] target-alpha: Disable interrupts properly., Richard Henderson, 2011/04/19