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Re: [Qemu-devel] [PATCH 02/17] lm32: translation routines
From: |
Michael Walle |
Subject: |
Re: [Qemu-devel] [PATCH 02/17] lm32: translation routines |
Date: |
Fri, 11 Feb 2011 23:23:05 +0100 |
User-agent: |
KMail/1.13.5 (Linux/2.6.32-5-686-bigmem; KDE/4.4.5; i686; ; ) |
Hi,
Regarding all the comments on raising an exception. The real hardware does
only support a few basic exception (like div by zero or interrupts and system
calls). There is no checking if an instruction is supported or not. If an
illegal opcode (like divu if the hardware divider is not enabled) is decoded,
the behaviour is undefined.
Additionally, there are no privileged instructions, no distinction between
kernel and userspace, no memory protection, the LM32 CPU targets to be a
lightweight and relative fast softcore for FPGAs. There are many ways to kill
the VM from 'userspace' (in real hardware and in my qemu port :) )
I treat QEMU as a tool to help developers writing software for this platform,
rather than really running software inside a VM.
That said, IMHO the best handling of unknown opcodes would be to kill the VM.
--
Michael
- Re: [Qemu-devel] [PATCH 11/17] lm32: system control model, (continued)
[Qemu-devel] [PATCH 16/17] Add lm32 target to configure, Michael Walle, 2011/02/10
[Qemu-devel] [PATCH 10/17] lm32: uart model, Michael Walle, 2011/02/10
[Qemu-devel] [PATCH 07/17] lm32: juart model, Michael Walle, 2011/02/10
[Qemu-devel] [PATCH 03/17] lm32: translation code helper, Michael Walle, 2011/02/10
[Qemu-devel] [PATCH 02/17] lm32: translation routines, Michael Walle, 2011/02/10
Re: [Qemu-devel] [PATCH 02/17] lm32: translation routines, Michael Walle, 2011/02/12
[Qemu-devel] [PATCH 06/17] lm32: interrupt controller model, Michael Walle, 2011/02/10
[Qemu-devel] [PATCH 13/17] lm32: EVR32 and uclinux BSP, Michael Walle, 2011/02/10
[Qemu-devel] [PATCH 12/17] lm32: support for creating device tree, Michael Walle, 2011/02/10