Re: [Qemu-devel] [PATCH v3] Softfloat: Add support to softfloat to return floatxx_default_nan when, the corresponding target status flag is set.

[Peter Maydell]

On 8 February 2011 18:53, Peter Maydell <address@hidden> wrote:
> On 8 February 2011 17:51, Christophe Lyon <address@hidden> wrote:
>> - this means implementing float16ToCommonNaN, thus float16_is_signaling_nan()
>
> ...like that, yes.

I have a slightly-tested implementation of these functions on my
hard disk now; I'll try to finish testing them tomorrow (my testing
is still falling over on some inputs to VCVTT/VCVTB).

(cc: Aurelien for the softfloat style questions:)

I think we should go ahead and define a float16 type.
Also, at the moment the commonNaNToFloatX(floatYToCommonNaN())
idiom doesn't do anything to avoid signaling NaNs showing up in
the output. On ARM this got fixed by having the helper.c wrappers
call float*_maybe_silence_nan() but maybe we should do it
in the generic softfloat code?

ie instead of:

    if ( mantissa )
        return make_float32(
            ( ( (bits32) a.sign )<<31 ) | 0x7F800000 | ( a.high>>41 ) );
    else
        return float32_default_nan;

do:
   float32 r = make_float32(
            ( ( (bits32) a.sign )<<31 ) | 0x7F800000 | ( a.high>>41 ) );
   if (!mantissa) {
      /* target specific, !SNAN_BIT_IS_ONE targets probably
       * just set the QNAN bit (true for ARM, SPARC)
       * others likely return the default NaN ?
       */
   } else {
      return float32_maybe_silence_nan(r);
   }

I'm pretty sure the existing code is wrong for SPARC, for instance,
which is supposed to return a float32 qNaN with just the QNAN bit set
if it is presented with a float64 signalling NaN all of whose non-zero
mantissa bits are at the bottom end and don't make it into the float32.
(ARM dodges a bullet here because as it happens our float32
default_nan has only the QNAN bit set, but SPARC's has all the
mantissa bits set.)

Opinions?

-- PMM