[Qemu-devel] [PATCH 3/3] pci/pcie: make pci_find_device() ARI aware.

[Isaku Yamahata]

make pci_find_device() ARI aware.

Signed-off-by: Isaku Yamahata <address@hidden>
---
 hw/pci.c  |    6 ++++++
 hw/pcie.c |   33 +++++++++++++++++++++++++++++----
 hw/pcie.h |    2 +-
 3 files changed, 36 insertions(+), 5 deletions(-)

diff --git a/hw/pci.c b/hw/pci.c
index ac16029..daba310 100644
--- a/hw/pci.c
+++ b/hw/pci.c
@@ -1601,12 +1601,18 @@ PCIBus *pci_find_bus(PCIBus *bus, int bus_num)
 
 PCIDevice *pci_find_device(PCIBus *bus, int bus_num, int devfn)
 {
+    PCIDevice *d;
     assert(devfn < PCI_DEVFN_MAX);
     bus = pci_find_bus(bus, bus_num);
 
     if (!bus)
         return NULL;
 
+    d = bus->parent_dev;
+    /* ARI: See the comment above the pcie_check_slot() for details */
+    if (d && !pcie_check_slot(d, devfn)) {
+        return NULL;
+    }
     return bus->devices[devfn];
 }
 
diff --git a/hw/pcie.c b/hw/pcie.c
index 6a113a9..ae4b531 100644
--- a/hw/pcie.c
+++ b/hw/pcie.c
@@ -424,13 +424,38 @@ void pcie_cap_ari_reset(PCIDevice *dev)
     pci_long_test_and_clear_mask(devctl2, PCI_EXP_DEVCTL2_ARI);
 }
 
-bool pcie_cap_is_ari_enabled(const PCIDevice *dev)
+/*
+ * 6.13 Alternative routing-ID Interpretation(ARI)
+ * 7.8.16 Device control 2 register
+ *   ARI forwarding Enable
+ *
+ * With PCI Express Endpoints, there's a single device behind
+ * each downstream port bus, and bits 3:7 of the function number get
+ * encoded in the slot number (the Express spec calls it the Device
+ * Number). This allows > 8 functions, but
+ * these extended functions are only accessible when the
+ * Alternative routing-ID Interpretation (ARI)
+ * capability is enabled in the root/downstream port. With that capability
+ * disabled the port enforces the Device Number field being 0.
+ */
+bool pcie_check_slot(const PCIDevice *dev, int devfn)
 {
+    uint8_t type;
+
     if (!pci_is_express(dev)) {
-        return false;
+        return true;
     }
-    if (!dev->exp.exp_cap) {
-        return false;
+
+    type = pcie_cap_get_type(dev);
+    if (!(type == PCI_EXP_TYPE_ROOT_PORT ||
+          type == PCI_EXP_TYPE_DOWNSTREAM)) {
+        return true;
+    }
+
+    if (!PCI_SLOT(devfn)) {
+        /* With ARI, this means function < 8.
+           functions < 8 are always accesible. */
+        return true;
     }
 
     return pci_get_long(dev->config + dev->exp.exp_cap + PCI_EXP_DEVCTL2) &
diff --git a/hw/pcie.h b/hw/pcie.h
index bc909e2..0c84662 100644
--- a/hw/pcie.h
+++ b/hw/pcie.h
@@ -119,7 +119,7 @@ void pcie_cap_flr_write_config(PCIDevice *dev,
 
 void pcie_cap_ari_init(PCIDevice *dev);
 void pcie_cap_ari_reset(PCIDevice *dev);
-bool pcie_cap_is_ari_enabled(const PCIDevice *dev);
+bool pcie_check_slot(const PCIDevice *dev, int devfn);
 
 /* PCI express extended capability helper functions */
 uint16_t pcie_find_capability(PCIDevice *dev, uint16_t cap_id);
-- 
1.7.1.1