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Re: [Qemu-devel] Bug report about x86 'bt' insn


From: malc
Subject: Re: [Qemu-devel] Bug report about x86 'bt' insn
Date: Wed, 10 Nov 2010 17:19:30 +0300 (MSK)
User-agent: Alpine 2.00 (LNX 1167 2008-08-23)

On Wed, 10 Nov 2010, Torbjorn Granlund wrote:

> malc <address@hidden> writes:
> 
>   And this one was March 2009 (conveniently having the same file name
>   253666), the September 2010 issue reads differently:
>   
>   Flags Affected
>   The CF flag contains the value of the selected bit. The ZF flag is 
>   unaffected. The OF, SF, AF, and PF flags are undefined.
> 
> Have the qemu developers come to any decision on this one?
> 
> I haven't tested many 32-bit x86 implementations, but I think I have
> tested all 64-bit x86 implementations, and they all seem to leave ZF
> unaffected.  (Clearly, it is possible that they do write it for some
> values of the operands; there are too many possible values to test.)
> 
> I actually think qemu for both x86-32 and x86-64 should be changed to
> make the bt insn not affect ZF.  Considering that Intel have changed
> their manuals (I have confirmed this) to say that ZF is unaffected,
> there are even stronger reasons to change qemu.  Even without that
> documentation change, I would argue that compatibility with all defacto
> hardware is important.
> 

All is the keyword here, i doubt that exhaustive search was performed
furthermore, AMDs documentation (to the best of my knowledge still)
still maintains that ZF is undefined.

That said the bt operation should be changed but for different reasons.

> (I am not trying to say that my bug report was correct.  It wasn't.  I
> have fixed the GMP code.)
> 
> 

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