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Re: [Qemu-devel] [PATCH] target-arm: Handle 'smc' as an undefined instru


From: Peter Maydell
Subject: Re: [Qemu-devel] [PATCH] target-arm: Handle 'smc' as an undefined instruction
Date: Thu, 2 Sep 2010 23:14:23 +0100
User-agent: Mutt/1.5.18 (2008-05-17)

On Thu, Sep 02, 2010 at 11:40:50PM +0200, Adam Lackorzynski wrote:
> +        case 7:
> +            /* SMC? */
> +            if ((insn & 0xfffffff0) == 0xe1600070) {
> +                goto illegal_op;
> +            }
> +            /* bkpt */

This doesn't look right to me. SMC in the ARM encoding is a standard
conditionalised instruction, so you shouldn't be mandating that the
cond field is 0xe.

I think the correct way to distinguish BKPT from SMC is to look at
bits [22..21] of the instruction: 01 for BKPT, 11 for SMC and
other combinations are UNDEFINED. This is in 'op1' at this point
in the code...

-- Peter Maydell



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