[Qemu-devel] [PATCH 27/34] pci: replace pci_bus_set_mem_base() with bus specific manipulation

[Blue Swirl]

Move PCI memory base adjustment to APB specific MMIO manipulator.

Signed-off-by: Blue Swirl <address@hidden>
---
 hw/apb_pci.c |   25 ++++++++++++++++++++++++-
 hw/pci.c     |   26 +++++---------------------
 hw/pci.h     |    2 --
 3 files changed, 29 insertions(+), 24 deletions(-)

diff --git a/hw/apb_pci.c b/hw/apb_pci.c
index 0ecac55..71c5e75 100644
--- a/hw/apb_pci.c
+++ b/hw/apb_pci.c
@@ -75,6 +75,7 @@ typedef struct APBState {
     qemu_irq pci_irqs[32];
     uint32_t reset_control;
     unsigned int nr_resets;
+    target_phys_addr_t mem_base;
 } APBState;

 static void apb_config_writel (void *opaque, target_phys_addr_t addr,
@@ -314,6 +315,26 @@ static void apb_pci_bridge_init(PCIBus *b)
     pci_set_byte(dev->config + PCI_REVISION_ID, 0x11);
 }

+static void apb_register_mem(void *opaque, pcibus_t addr, pcibus_t size,
+                             int mm)
+{
+    APBState *d = opaque;
+
+    APB_DPRINTF("%s: addr %" FMT_PCIBUS " size %" FMT_PCIBUS " mm %x\n",
+                __func__, addr, size, mm);
+    cpu_register_physical_memory(addr + d->mem_base, size, mm);
+}
+
+static void apb_unregister_mem(void *opaque, pcibus_t addr, pcibus_t size)
+{
+    APBState *d = opaque;
+
+    APB_DPRINTF("%s: addr %" FMT_PCIBUS " size %" FMT_PCIBUS "\n",
+                __func__, addr, size);
+    cpu_register_physical_memory(addr + d->mem_base, size, IO_MEM_UNASSIGNED);
+}
+
+
 PCIBus *pci_apb_init(target_phys_addr_t special_base,
                      target_phys_addr_t mem_base,
                      qemu_irq *pic, PCIBus **bus2, PCIBus **bus3)
@@ -334,11 +355,13 @@ PCIBus *pci_apb_init(target_phys_addr_t special_base,
     /* pci_ioport */
     sysbus_mmio_map(s, 2, special_base + 0x2000000ULL);
     d = FROM_SYSBUS(APBState, s);
+    d->mem_base = mem_base;

     d->bus = pci_register_bus(&d->busdev.qdev, "pci",
                                          pci_apb_set_irq, pci_pbm_map_irq, d,
                                          0, 32);
-    pci_bus_set_mem_base(d->bus, mem_base);
+    pci_bus_set_register_mem_fn(d->bus, apb_register_mem,
+                                apb_unregister_mem, d);

     for (i = 0; i < 32; i++) {
         sysbus_connect_irq(s, i, pic[i]);
diff --git a/hw/pci.c b/hw/pci.c
index 3555ef3..d617c9f 100644
--- a/hw/pci.c
+++ b/hw/pci.c
@@ -46,7 +46,6 @@ struct PCIBus {
     void *irq_opaque;
     PCIDevice *devices[256];
     PCIDevice *parent_dev;
-    target_phys_addr_t mem_base;
     pci_register_mem_fn register_mem;
     pci_unregister_mem_fn unregister_mem;
     void *register_mem_opaque;
@@ -293,11 +292,6 @@ void pci_bus_hotplug(PCIBus *bus, pci_hotplug_fn
hotplug, DeviceState *qdev)
     bus->hotplug_qdev = qdev;
 }

-void pci_bus_set_mem_base(PCIBus *bus, target_phys_addr_t base)
-{
-    bus->mem_base = base;
-}
-
 PCIBus *pci_register_bus(DeviceState *parent, const char *name,
                          pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
                          void *irq_opaque, int devfn_min, int nirq)
@@ -752,12 +746,6 @@ PCIDevice *pci_register_device(PCIBus *bus, const
char *name,
     return pci_dev;
 }

-static target_phys_addr_t pci_to_cpu_addr(PCIBus *bus,
-                                          target_phys_addr_t addr)
-{
-    return addr + bus->mem_base;
-}
-
 static void pci_unregister_io_regions(PCIDevice *pci_dev)
 {
     PCIIORegion *r;
@@ -779,8 +767,7 @@ static void pci_unregister_io_regions(PCIDevice *pci_dev)
                 isa_unassign_ioport(r->addr + s->offset, s->filtered_size);
             } else {
                 pci_dev->bus->unregister_mem(pci_dev->bus->register_mem_opaque,
-                                             pci_to_cpu_addr(pci_dev->bus,
-                                                             r->addr
+ s->offset),
+                                             r->addr + s->offset,
                                              s->filtered_size);
             }
         }
@@ -1092,9 +1079,7 @@ static void pci_update_mappings(PCIDevice *d)
                     }
                 } else {
                     d->bus->unregister_mem(d->bus->register_mem_opaque,
-                                           pci_to_cpu_addr(d->bus,
-                                                           r->addr +
-                                                           s->offset),
+                                           r->addr + s->offset,
                                            s->filtered_size);
                     qemu_unregister_coalesced_mmio(r->addr + s->offset,
                                                    s->filtered_size);
@@ -1118,11 +1103,10 @@ static void pci_update_mappings(PCIDevice *d)
                     }
                 } else {
                     d->bus->register_mem(d->bus->register_mem_opaque,
-                                         pci_to_cpu_addr(d->bus, new_addr),
-                                         s->filtered_size, s->ix);
+                                         new_addr, s->filtered_size,
+                                         s->ix);
                     if (r->post_map_func) {
-                        r->post_map_func(d, i,
-                                         pci_to_cpu_addr(d->bus, new_addr),
+                        r->post_map_func(d, i, new_addr,
                                          s->filtered_size, r->type);
                     }
                 }
diff --git a/hw/pci.h b/hw/pci.h
index 8c2b84c..71d75b6 100644
--- a/hw/pci.h
+++ b/hw/pci.h
@@ -226,8 +226,6 @@ PCIBus *pci_register_bus(DeviceState *parent,
const char *name,
                          pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
                          void *irq_opaque, int devfn_min, int nirq);

-void pci_bus_set_mem_base(PCIBus *bus, target_phys_addr_t base);
-
 typedef void (*pci_register_mem_fn)(void *opaque, pcibus_t addr, pcibus_t size,
                                     int mm);
 typedef void (*pci_unregister_mem_fn)(void *opaque, pcibus_t addr,
-- 
1.6.2.4