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RE: [Qemu-devel] VLIW?
From: |
Gibbons, Scott |
Subject: |
RE: [Qemu-devel] VLIW? |
Date: |
Thu, 17 Jun 2010 11:05:38 -0700 |
My architecture is an Interleaved Multithreading VLIW architecture. One bundle
(packet) executes per processor cycle, rotating between threads (i.e., thread 0
executes at time 0, thread 1 executes at time 1, then thread 0 executes at time
2, etc.). Each thread has its own context (including a program counter). I'm
not sure what kind of performance I would get in translating a single bundle at
a time (or maybe I'm misunderstanding).
I think I'll get basic single-thread operation working first, then attempt
multithreading when I have a spare month or so.
Thanks,
--Scott
-----------------------------------------------------------
Qualcomm Inc. / Hexagon Tools
Austin, TX
address@hidden
Office: 512-623-3831
Cell: 469-450-8390
-----Original Message-----
From: Richard Henderson [mailto:address@hidden On Behalf Of Richard Henderson
Sent: Thursday, June 17, 2010 11:03 AM
To: Gibbons, Scott
Cc: address@hidden
Subject: Re: [Qemu-devel] VLIW?
On 06/17/2010 08:12 AM, Gibbons, Scott wrote:
> Another question I have is how to handle this multithreaded
> architecture. This seems to be extraordinarily difficult as a
> dynamic translation problem and I'll probably defer it to later.
> But, if anyone has any suggestions, I'd be glad to hear them.
How is your threading different from other SMP systems?
In system mode, QEMU TCG is single-threaded and models SMP via
cooperative switching in between TCG translation blocks. It's
not ideal, but it does solve quite a number of problems and is
at least functional.
r~