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Re: [Qemu-devel] [PATCH 21/22] tcg-i386: Use lea for three-operand add.
From: |
Aurelien Jarno |
Subject: |
Re: [Qemu-devel] [PATCH 21/22] tcg-i386: Use lea for three-operand add. |
Date: |
Fri, 21 May 2010 11:44:57 +0200 |
User-agent: |
Mutt/1.5.20 (2009-06-14) |
On Wed, Apr 14, 2010 at 01:29:27PM -0700, Richard Henderson wrote:
> The result is shorter than the mov+add that TCG would
> otherwise generate for us.
>
> Signed-off-by: Richard Henderson <address@hidden>
Acked-by: Aurelien Jarno <address@hidden>
> ---
> tcg/i386/tcg-target.c | 23 ++++++++++++++++++++---
> 1 files changed, 20 insertions(+), 3 deletions(-)
>
> diff --git a/tcg/i386/tcg-target.c b/tcg/i386/tcg-target.c
> index 755d46d..646a7b6 100644
> --- a/tcg/i386/tcg-target.c
> +++ b/tcg/i386/tcg-target.c
> @@ -1186,6 +1186,25 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode
> opc,
> case INDEX_op_st_i32:
> tcg_out_st(s, TCG_TYPE_I32, args[0], args[1], args[2]);
> break;
> + case INDEX_op_add_i32:
> + /* For 3-operand addition, use LEA. */
> + if (args[0] != args[1]) {
> + TCGArg a0 = args[0], a1 = args[1], a2 = args[2], c3 = 0;
> +
> + if (const_args[2]) {
> + c3 = a2, a2 = -1;
> + } else if (a0 == a2) {
> + /* Watch out for dest = src + dest, since we've removed
> + the matching constraint on the add. */
> + tgen_arithr(s, ARITH_ADD, a0, a1);
> + break;
> + }
> +
> + tcg_out_modrm_sib_offset(s, OPC_LEA, a0, a1, a2, 0, c3);
> + break;
> + }
> + c = ARITH_ADD;
> + goto gen_arith;
> case INDEX_op_sub_i32:
> c = ARITH_SUB;
> goto gen_arith;
> @@ -1198,8 +1217,6 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode
> opc,
> case INDEX_op_xor_i32:
> c = ARITH_XOR;
> goto gen_arith;
> - case INDEX_op_add_i32:
> - c = ARITH_ADD;
> gen_arith:
> if (const_args[2]) {
> tgen_arithi(s, c, args[0], args[2], 0);
> @@ -1374,7 +1391,7 @@ static const TCGTargetOpDef x86_op_defs[] = {
> { INDEX_op_st16_i32, { "r", "r" } },
> { INDEX_op_st_i32, { "r", "r" } },
>
> - { INDEX_op_add_i32, { "r", "0", "ri" } },
> + { INDEX_op_add_i32, { "r", "r", "ri" } },
> { INDEX_op_sub_i32, { "r", "0", "ri" } },
> { INDEX_op_mul_i32, { "r", "0", "ri" } },
> { INDEX_op_mulu2_i32, { "a", "d", "a", "r" } },
> --
> 1.6.6.1
>
>
>
>
--
Aurelien Jarno GPG: 1024D/F1BCDB73
address@hidden http://www.aurel32.net
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