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[Qemu-devel] [PATCH 15/18] tcg/arm: remove useless register tests in qem
From: |
Aurelien Jarno |
Subject: |
[Qemu-devel] [PATCH 15/18] tcg/arm: remove useless register tests in qemu_ld/st |
Date: |
Wed, 7 Apr 2010 19:51:22 +0200 |
addr_reg, data_reg and data_reg2 can't be register r0 or r1 du to the
constraints. Don't check if they equals these registers.
Signed-off-by: Aurelien Jarno <address@hidden>
---
tcg/arm/tcg-target.c | 30 ++++++++++--------------------
1 files changed, 10 insertions(+), 20 deletions(-)
diff --git a/tcg/arm/tcg-target.c b/tcg/arm/tcg-target.c
index 4b414ff..a4419f8 100644
--- a/tcg/arm/tcg-target.c
+++ b/tcg/arm/tcg-target.c
@@ -1030,10 +1030,8 @@ static inline void tcg_out_qemu_ld(TCGContext *s, const
TCGArg *args, int opc)
# if TARGET_LONG_BITS == 32
tcg_out_dat_imm(s, COND_AL, ARITH_MOV, TCG_REG_R1, 0, mem_index);
# else
- if (addr_reg2 != TCG_REG_R1) {
- tcg_out_dat_reg(s, COND_AL, ARITH_MOV,
- TCG_REG_R1, 0, addr_reg2, SHIFT_IMM_LSL(0));
- }
+ tcg_out_dat_reg(s, COND_AL, ARITH_MOV,
+ TCG_REG_R1, 0, addr_reg2, SHIFT_IMM_LSL(0));
tcg_out_dat_imm(s, COND_AL, ARITH_MOV, TCG_REG_R2, 0, mem_index);
# endif
tcg_out_bl(s, COND_AL, (tcg_target_long) qemu_ld_helpers[s_bits] -
@@ -1239,10 +1237,8 @@ static inline void tcg_out_qemu_st(TCGContext *s, const
TCGArg *args, int opc)
tcg_out_b(s, COND_EQ, 8);
/* TODO: move this code to where the constants pool will be */
- if (addr_reg != TCG_REG_R0) {
- tcg_out_dat_reg(s, COND_AL, ARITH_MOV,
- TCG_REG_R0, 0, addr_reg, SHIFT_IMM_LSL(0));
- }
+ tcg_out_dat_reg(s, COND_AL, ARITH_MOV,
+ TCG_REG_R0, 0, addr_reg, SHIFT_IMM_LSL(0));
# if TARGET_LONG_BITS == 32
switch (opc) {
case 0:
@@ -1254,17 +1250,13 @@ static inline void tcg_out_qemu_st(TCGContext *s, const
TCGArg *args, int opc)
tcg_out_dat_imm(s, COND_AL, ARITH_MOV, TCG_REG_R2, 0, mem_index);
break;
case 2:
- if (data_reg != TCG_REG_R1) {
- tcg_out_dat_reg(s, COND_AL, ARITH_MOV,
- TCG_REG_R1, 0, data_reg, SHIFT_IMM_LSL(0));
- }
+ tcg_out_dat_reg(s, COND_AL, ARITH_MOV,
+ TCG_REG_R1, 0, data_reg, SHIFT_IMM_LSL(0));
tcg_out_dat_imm(s, COND_AL, ARITH_MOV, TCG_REG_R2, 0, mem_index);
break;
case 3:
- if (data_reg != TCG_REG_R1) {
- tcg_out_dat_reg(s, COND_AL, ARITH_MOV,
- TCG_REG_R1, 0, data_reg, SHIFT_IMM_LSL(0));
- }
+ tcg_out_dat_reg(s, COND_AL, ARITH_MOV,
+ TCG_REG_R1, 0, data_reg, SHIFT_IMM_LSL(0));
if (data_reg2 != TCG_REG_R2) {
tcg_out_dat_reg(s, COND_AL, ARITH_MOV,
TCG_REG_R2, 0, data_reg2, SHIFT_IMM_LSL(0));
@@ -1273,10 +1265,8 @@ static inline void tcg_out_qemu_st(TCGContext *s, const
TCGArg *args, int opc)
break;
}
# else
- if (addr_reg2 != TCG_REG_R1) {
- tcg_out_dat_reg(s, COND_AL, ARITH_MOV,
- TCG_REG_R1, 0, addr_reg2, SHIFT_IMM_LSL(0));
- }
+ tcg_out_dat_reg(s, COND_AL, ARITH_MOV,
+ TCG_REG_R1, 0, addr_reg2, SHIFT_IMM_LSL(0));
switch (opc) {
case 0:
tcg_out_ext8u(s, COND_AL, TCG_REG_R2, data_reg);
--
1.7.0.4
- Re: [Qemu-devel] [PATCH 06/18] tcg/arm: add defines for the allowed instructions set, (continued)
- [Qemu-devel] [PATCH 03/18] tcg/arm: remove store signed functions, Aurelien Jarno, 2010/04/07
- [Qemu-devel] [PATCH 04/18] tcg/arm: replace integer values by registers enum, Aurelien Jarno, 2010/04/07
- [Qemu-devel] [PATCH 18/18] tcg/arm: don't try to load constants using pc, Aurelien Jarno, 2010/04/07
- [Qemu-devel] [PATCH 13/18] tcg/arm: use ext* ops in qemu_ld, Aurelien Jarno, 2010/04/07
- [Qemu-devel] [PATCH 10/18] tcg/arm: add ext16u op, Aurelien Jarno, 2010/04/07
- [Qemu-devel] [PATCH 16/18] tcg/arm: fix argument alignment in qemu_st64, Aurelien Jarno, 2010/04/07
- [Qemu-devel] [PATCH 17/18] tcg/arm: optimize register allocation order, Aurelien Jarno, 2010/04/07
- [Qemu-devel] [PATCH 14/18] tcg/arm: bswap arguments in qemu_ld/st if needed, Aurelien Jarno, 2010/04/07
- [Qemu-devel] [PATCH 15/18] tcg/arm: remove useless register tests in qemu_ld/st,
Aurelien Jarno <=
- [Qemu-devel] [PATCH 12/18] tcg/arm: remove conditional argument for qemu_ld/st, Aurelien Jarno, 2010/04/07