Re: [Qemu-devel] [PATCH] target-mips: fix ROTR and DROTR by zero

[Aurelien Jarno]

On Sat, Feb 20, 2010 at 10:24:07AM -0800, Nathan Froyd wrote:
> 
> Signed-off-by: Nathan Froyd <address@hidden>

Thanks applied.

> ---
>  target-mips/translate.c |    4 ++++
>  1 files changed, 4 insertions(+), 0 deletions(-)
> 
> diff --git a/target-mips/translate.c b/target-mips/translate.c
> index dfea6f6..de5ac18 100644
> --- a/target-mips/translate.c
> +++ b/target-mips/translate.c
> @@ -1476,6 +1476,8 @@ static void gen_shift_imm(CPUState *env, DisasContext 
> *ctx, uint32_t opc,
>              tcg_gen_rotri_i32(t1, t1, uimm);
>              tcg_gen_ext_i32_tl(cpu_gpr[rt], t1);
>              tcg_temp_free_i32(t1);
> +        } else {
> +            tcg_gen_ext32s_tl(cpu_gpr[rt], t0);
>          }
>          opn = "rotr";
>          break;
> @@ -1495,6 +1497,8 @@ static void gen_shift_imm(CPUState *env, DisasContext 
> *ctx, uint32_t opc,
>      case OPC_DROTR:
>          if (uimm != 0) {
>              tcg_gen_rotri_tl(cpu_gpr[rt], t0, uimm);
> +        } else {
> +            tcg_gen_mov_tl(cpu_gpr[rt], t0);
>          }
>          opn = "drotr";
>          break;
> -- 
> 1.6.3.2
> 
> 
> 
> 

-- 
Aurelien Jarno                          GPG: 1024D/F1BCDB73
address@hidden                 http://www.aurel32.net