[Qemu-devel] [PATCH 60/61] pci: add opaque arg to pci_map_irq_fn.

[Isaku Yamahata]

add opaque arg to pci_map_irq_fn.

Signed-off-by: Isaku Yamahata <address@hidden>
---
 hw/apb_pci.c       |    4 ++--
 hw/grackle_pci.c   |    2 +-
 hw/gt64xxx.c       |    2 +-
 hw/ppc4xx_pci.c    |    2 +-
 hw/ppce500_pci.c   |    2 +-
 hw/prep_pci.c      |    2 +-
 hw/r2d.c           |    2 +-
 hw/unin_pci.c      |    2 +-
 hw/versatile_pci.c |    2 +-
 9 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/hw/apb_pci.c b/hw/apb_pci.c
index f679847..17d63c6 100644
--- a/hw/apb_pci.c
+++ b/hw/apb_pci.c
@@ -203,12 +203,12 @@ static CPUReadMemoryFunc * const pci_apb_ioread[] = {
 };
 
 /* The APB host has an IRQ line for each IRQ line of each slot.  */
-static int pci_apb_map_irq(PCIDevice *pci_dev, int irq_num)
+static int pci_apb_map_irq(void *opaque, PCIDevice *pci_dev, int irq_num)
 {
     return ((pci_dev->devfn & 0x18) >> 1) + irq_num;
 }
 
-static int pci_pbm_map_irq(PCIDevice *pci_dev, int irq_num)
+static int pci_pbm_map_irq(void *opaque, PCIDevice *pci_dev, int irq_num)
 {
     int bus_offset;
     if (pci_dev->devfn & 1)
diff --git a/hw/grackle_pci.c b/hw/grackle_pci.c
index 59664b7..2a5bdd3 100644
--- a/hw/grackle_pci.c
+++ b/hw/grackle_pci.c
@@ -97,7 +97,7 @@ static CPUReadMemoryFunc * const pci_grackle_read[] = {
 };
 
 /* Don't know if this matches real hardware, but it agrees with OHW.  */
-static int pci_grackle_map_irq(PCIDevice *pci_dev, int irq_num)
+static int pci_grackle_map_irq(void *opaque, PCIDevice *pci_dev, int irq_num)
 {
     return (irq_num + (pci_dev->devfn >> 3)) & 3;
 }
diff --git a/hw/gt64xxx.c b/hw/gt64xxx.c
index f8d0dcc..a85190a 100644
--- a/hw/gt64xxx.c
+++ b/hw/gt64xxx.c
@@ -866,7 +866,7 @@ static CPUReadMemoryFunc * const gt64120_read[] = {
     &gt64120_readl,
 };
 
-static int pci_gt64120_map_irq(PCIDevice *pci_dev, int irq_num)
+static int pci_gt64120_map_irq(void *opaque, PCIDevice *pci_dev, int irq_num)
 {
     int slot;
 
diff --git a/hw/ppc4xx_pci.c b/hw/ppc4xx_pci.c
index 01b8eb1..5170976 100644
--- a/hw/ppc4xx_pci.c
+++ b/hw/ppc4xx_pci.c
@@ -294,7 +294,7 @@ static void ppc4xx_pci_reset(void *opaque)
 
 /* On Bamboo, all pins from each slot are tied to a single board IRQ. This
  * may need further refactoring for other boards. */
-static int ppc4xx_pci_map_irq(PCIDevice *pci_dev, int irq_num)
+static int ppc4xx_pci_map_irq(void *opaque, PCIDevice *pci_dev, int irq_num)
 {
     int slot = pci_dev->devfn >> 3;
 
diff --git a/hw/ppce500_pci.c b/hw/ppce500_pci.c
index e388a9a..727f096 100644
--- a/hw/ppce500_pci.c
+++ b/hw/ppce500_pci.c
@@ -233,7 +233,7 @@ static CPUWriteMemoryFunc * const e500_pci_reg_write[] = {
     &pci_reg_write4,
 };
 
-static int mpc85xx_pci_map_irq(PCIDevice *pci_dev, int irq_num)
+static int mpc85xx_pci_map_irq(void *opaque, PCIDevice *pci_dev, int irq_num)
 {
     int devno = pci_dev->devfn >> 3, ret = 0;
 
diff --git a/hw/prep_pci.c b/hw/prep_pci.c
index 72498bf..5113550 100644
--- a/hw/prep_pci.c
+++ b/hw/prep_pci.c
@@ -119,7 +119,7 @@ static CPUReadMemoryFunc * const PPC_PCIIO_read[] = {
     &PPC_PCIIO_readl,
 };
 
-static int prep_map_irq(PCIDevice *pci_dev, int irq_num)
+static int prep_map_irq(void *opaque, PCIDevice *pci_dev, int irq_num)
 {
     return (irq_num + (pci_dev->devfn >> 3)) & 1;
 }
diff --git a/hw/r2d.c b/hw/r2d.c
index ea19ff6..59dbc43 100644
--- a/hw/r2d.c
+++ b/hw/r2d.c
@@ -191,7 +191,7 @@ static void r2d_pci_set_irq(void *opaque, int n, int l)
     qemu_set_irq(p[n], l);
 }
 
-static int r2d_pci_map_irq(PCIDevice *d, int irq_num)
+static int r2d_pci_map_irq(void *opaque, PCIDevice *d, int irq_num)
 {
     const int intx[] = { PCI_INTA, PCI_INTB, PCI_INTC, PCI_INTD };
     return intx[d->devfn >> 3];
diff --git a/hw/unin_pci.c b/hw/unin_pci.c
index ac69b7f..8fc0b6a 100644
--- a/hw/unin_pci.c
+++ b/hw/unin_pci.c
@@ -136,7 +136,7 @@ static CPUReadMemoryFunc * const pci_unin_read[] = {
 };
 
 /* Don't know if this matches real hardware, but it agrees with OHW.  */
-static int pci_unin_map_irq(PCIDevice *pci_dev, int irq_num)
+static int pci_unin_map_irq(void *opaque, PCIDevice *pci_dev, int irq_num)
 {
     return (irq_num + (pci_dev->devfn >> 3)) & 3;
 }
diff --git a/hw/versatile_pci.c b/hw/versatile_pci.c
index a0d7d07..5770635 100644
--- a/hw/versatile_pci.c
+++ b/hw/versatile_pci.c
@@ -85,7 +85,7 @@ static CPUReadMemoryFunc * const pci_vpb_config_read[] = {
     &pci_vpb_config_readl,
 };
 
-static int pci_vpb_map_irq(PCIDevice *d, int irq_num)
+static int pci_vpb_map_irq(void *opaque, PCIDevice *d, int irq_num)
 {
     return irq_num;
 }
-- 
1.6.0.2