Re: [Qemu-devel] [patch] Fix extlh instruction on Alpha

[Filip Navara]

On Wed, Aug 5, 2009 at 5:26 AM, Vince Weaver<address@hidden> wrote:
> Hello
>
> The extlh instruction on Alpha currently doesn't work properly.
> It's a combination of a cut/paste bug (16 where it should be 32) as well
> as a "shift by 64" bug.
>
> Below is a patch that fixes the problem, and attached is a test case that
> exhibits the bug.  The program should print a 4-char wide sliding window
> across the test string; without the patch this fails.
>
> Vince
>
> Signed-off-by: Vince Weaver <address@hidden>
>
> diff --git a/target-alpha/translate.c b/target-alpha/translate.c
> index 1fc5119..2a681b0 100644
> --- a/target-alpha/translate.c
> +++ b/target-alpha/translate.c
> @@ -526,14 +526,24 @@ static always_inline void gen_ext_h(void 
> (*tcg_gen_ext_i64)(TCGv t0, TCGv t1),
>             else
>                 tcg_gen_mov_i64(cpu_ir[rc], cpu_ir[ra]);
>         } else {
> +            int l1;
>             TCGv tmp1, tmp2;
>             tmp1 = tcg_temp_new();

This should be tcg_temp_local_new since you added a branch instruction
and normal temporary variables are live in a basic block (eg. not
across a branch).

> +            l1 = gen_new_label();
> +
>             tcg_gen_andi_i64(tmp1, cpu_ir[rb], 7);
>             tcg_gen_shli_i64(tmp1, tmp1, 3);
> +
> +            tcg_gen_mov_i64(cpu_ir[rc], cpu_ir[ra]);
> +            tcg_gen_brcondi_i64(TCG_COND_EQ, tmp1, 0, l1);
> +
>             tmp2 = tcg_const_i64(64);
>             tcg_gen_sub_i64(tmp1, tmp2, tmp1);
>             tcg_temp_free(tmp2);
>             tcg_gen_shl_i64(cpu_ir[rc], cpu_ir[ra], tmp1);
> +
> +            gen_set_label(l1);
> +
>             tcg_temp_free(tmp1);
>         }
>         if (tcg_gen_ext_i64)
> @@ -1320,7 +1330,7 @@ static always_inline int translate_one (DisasContext 
> *ctx, uint32_t insn)
>             break;
>         case 0x6A:
>             /* EXTLH */
> -            gen_ext_h(&tcg_gen_ext16u_i64, ra, rb, rc, islit, lit);
> +            gen_ext_h(&tcg_gen_ext32u_i64, ra, rb, rc, islit, lit);
>             break;
>         case 0x72:
>             /* MSKQH */

Best regards,
Filip Navara