Introduce support for max_cpus and use it to generate MADT and SSDT
tables.

If nothing provided, default to 15, to make sure not to break
certain legacy OSes.

This is similar in functionality to what was pushed into QEMU/BOCHS.

Signed-off-by: Jes Sorense <address@hidden>

---
 src/acpi.c     |   21 ++++++++++++++-------
 src/qemu-cfg.c |    8 ++++++++
 src/qemu-cfg.h |    3 +++
 3 files changed, 25 insertions(+), 7 deletions(-)

Index: seabios/src/acpi.c
===================================================================
--- seabios.orig/src/acpi.c
+++ seabios/src/acpi.c
@@ -12,7 +12,7 @@
 #include "biosvar.h" // GET_EBDA
 #include "pci_ids.h" // PCI_VENDOR_ID_INTEL
 #include "pci_regs.h" // PCI_INTERRUPT_LINE
-
+#include "qemu-cfg.h"
 
 /****************************************************/
 /* ACPI tables init */
@@ -213,6 +213,11 @@ struct madt_intsrcovr {
 } PACKED;
 
 #include "acpi-dsdt.hex"
+/*
+ * Maximum number of supported CPUs, including hot-plug.
+ */
+#define MAX_CPUS_DEFAULT	15
+u16 max_cpus;
 
 static inline u16 cpu_to_le16(u16 x)
 {
@@ -245,8 +250,7 @@ acpi_build_processor_ssdt(u8 *ssdt)
 {
     u8 *ssdt_ptr = ssdt;
     int i, length;
-    int smp_cpus = CountCPUs;
-    int acpi_cpus = smp_cpus > 0xff ? 0xff : smp_cpus;
+    int acpi_cpus = max_cpus > 0xff ? 0xff : max_cpus;
 
     ssdt_ptr[9] = 0; // checksum;
     ssdt_ptr += sizeof(struct acpi_table_header);
@@ -301,6 +305,10 @@ void acpi_bios_init(void)
     if (! CONFIG_ACPI)
         return;
 
+    max_cpus = qemu_cfg_get_max_cpus();
+    if (!max_cpus)
+	    max_cpus = MAX_CPUS_DEFAULT;
+
     dprintf(3, "init ACPI tables\n");
 
     // This code is hardcoded for PIIX4 Power Management device.
@@ -348,11 +356,10 @@ void acpi_bios_init(void)
     ssdt = (void *)(addr);
     addr += acpi_build_processor_ssdt(ssdt);
 
-    int smp_cpus = CountCPUs;
     addr = ALIGN(addr, 8);
     madt_addr = addr;
     madt_size = sizeof(*madt) +
-        sizeof(struct madt_processor_apic) * smp_cpus +
+        sizeof(struct madt_processor_apic) * max_cpus +
         sizeof(struct madt_io_apic);
     madt = (void *)(addr);
     addr += madt_size;
@@ -417,7 +424,7 @@ void acpi_bios_init(void)
     madt->local_apic_address = cpu_to_le32(BUILD_APIC_ADDR);
     madt->flags = cpu_to_le32(1);
     struct madt_processor_apic *apic = (void *)&madt[1];
-    for(i=0;i<smp_cpus;i++) {
+    for(i = 0; i < max_cpus; i++) {
         apic->type = APIC_PROCESSOR;
         apic->length = sizeof(*apic);
         apic->processor_id = i;
@@ -428,7 +435,7 @@ void acpi_bios_init(void)
     struct madt_io_apic *io_apic = (void *)apic;
     io_apic->type = APIC_IO;
     io_apic->length = sizeof(*io_apic);
-    io_apic->io_apic_id = smp_cpus;
+    io_apic->io_apic_id = max_cpus;
     io_apic->address = cpu_to_le32(BUILD_IOAPIC_ADDR);
     io_apic->interrupt = cpu_to_le32(0);
 
Index: seabios/src/qemu-cfg.c
===================================================================
--- seabios.orig/src/qemu-cfg.c
+++ seabios/src/qemu-cfg.c
@@ -27,3 +27,11 @@ qemu_cfg_port_probe()
     return *(u32*)buf == *(u32*)sig;
 }
 
+u16 qemu_cfg_get_max_cpus(void)
+{
+    u16 cnt;
+
+    qemu_cfg_read((u8*)&cnt, QEMU_CFG_MAX_CPUS, sizeof(cnt));
+
+    return cnt;
+}
Index: seabios/src/qemu-cfg.h
===================================================================
--- seabios.orig/src/qemu-cfg.h
+++ seabios/src/qemu-cfg.h
@@ -12,8 +12,11 @@
 #define QEMU_CFG_SIGNATURE  0x00
 #define QEMU_CFG_ID         0x01
 #define QEMU_CFG_UUID       0x02
+#define QEMU_CFG_MAX_CPUS   0x0E
 
 void qemu_cfg_read(u8 *buf, u16 f, int len);
 int qemu_cfg_port_probe();
 
+u16 qemu_cfg_get_max_cpus(void);
+
 #endif