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From: | Alexander Graf |
Subject: | Re: [Qemu-devel] [PATCH] omit 3DNOW! CPUID bits from qemu64 CPU model |
Date: | Thu, 16 Jul 2009 18:50:40 +0200 |
On 16.07.2009, at 18:36, Jamie Lokier wrote:
Alexander Graf wrote:safe32 => common between KVM and TCG, 32-bit safe64 => common between KVM and TCG, 64-bitYeah. Maybe only "safe" and always assume x86_64? But then comes Intel ... sigh.Why x86_64? Some of use run KVM on 32-bit host CPUs. They're not antiques yet :-)
Well, Intel is the only vendor that has virtualization enabled CPUs that do _not_ support long mode. That's why the "sigh" is in there.
That would also make it easier to know where to put other fancy features like "SVM" :-)Can't we use SVM emulation with TCG and KVM both?We can use SVM emulation with TCG and KVM on SVM.Yay! Oh, wait, I have VMX instead :-/We can't on KVM with VMX and Xen HVM. For KVM it's fine though, because the feature gets masked out if it's not supported.Ok. I'm a bit surprised SVM isn't just easy to emulate on VMX, if it's done by emulating instructions and state transitions. Is SVM particularly good for nesting so that you don't need much emulation code in KVM's in-kernel minimal emulator?
Give it a go :-). Interception masks are different on both and probably some state is too. I'm pretty sure the TPR stuff is handled completely differently on both.
But maybe it's possible to hack something together that's good enough for running KVM. I don't think you'd be that fortunate about other hypervisors :o.
For Intel, doing PV nesting is probably more useful.
I'm biased as I was hoping to run nested KVMs on my VMX 32-bit Intel :-DStill, SVM isn't migratable on KVM atm, so let's better disable it for"safe".I agree, non-migratable things should be disabled for "safe".Is it because there's hidden state, or simply unimplemented save/ load code?
Mostly unimplemented save/load code. The hidden state can be worked around by always exiting the guest before we do a migration.
Alex
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