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Re: [Qemu-devel] [PATCHv2] Add rtc reset function.
From: |
Marcelo Tosatti |
Subject: |
Re: [Qemu-devel] [PATCHv2] Add rtc reset function. |
Date: |
Tue, 9 Jun 2009 12:45:33 -0300 |
User-agent: |
Mutt/1.5.19 (2009-01-05) |
On Tue, Jun 09, 2009 at 12:26:05PM +0300, Gleb Natapov wrote:
> On reset:
> Periodic Interrupt Enable (PIE) bit is cleared to zero
> Alarm Interrupt Enable (AIE) bit is cleared to zero
> Update ended Interrupt Flag (UF) bit is cleared to zero
> Interrupt Request status Flag (IRQF) bit is cleared to zero
> Periodic Interrupt Flag (PF) bit is cleared to zero
> Alarm Interrupt Flag (AF) bit is cleared to zero
> Square Wave output Enable (SQWE) zero
>
> Signed-off-by: Gleb Natapov <address@hidden>
> diff --git a/hw/mc146818rtc.c b/hw/mc146818rtc.c
> index 888b85a..8c446e1 100644
> --- a/hw/mc146818rtc.c
> +++ b/hw/mc146818rtc.c
> @@ -57,6 +57,11 @@
> #define REG_B_SQWE 0x08
> #define REG_B_DM 0x04
>
> +#define REG_C_UF 0x10
> +#define REG_C_IRQF 0x80
> +#define REG_C_PF 0x40
> +#define REG_C_AF 0x20
> +
> struct RTCState {
> uint8_t cmos_data[128];
> uint8_t cmos_index;
> @@ -568,6 +573,21 @@ static int rtc_load_td(QEMUFile *f, void *opaque, int
> version_id)
> }
> #endif
>
> +static void rtc_reset(void *opaque)
> +{
> + RTCState *s = opaque;
> +
> + s->cmos_data[RTC_REG_B] &= ~(REG_B_PIE | REG_B_AIE | REG_B_SQWE);
> + s->cmos_data[RTC_REG_C] &= ~(REG_C_UF | REG_C_IRQF | REG_C_PF |
> REG_C_AF);
> +
> + qemu_irq_lower(s->irq);
> +
> +#ifdef TARGET_I386
> + if (rtc_td_hack)
> + s->irq_coalesced = 0;
> +#endif
> +}
Don't you need to cancel the timer before clearing cmos_data[]?