[Qemu-devel] [PATCH 10/10] Remove r0 from the allocation pool on ppc/ppc64

[Nathan Froyd]

r0 is used as a temporary for forming 32-bit constants; it also has
unexpected behavior when used as a base register in load and store
instructions.

Signed-off-by: Nathan Froyd <address@hidden>
---
 tcg/ppc/tcg-target.c   |    1 -
 tcg/ppc64/tcg-target.c |    1 -
 2 files changed, 0 insertions(+), 2 deletions(-)

diff --git a/tcg/ppc/tcg-target.c b/tcg/ppc/tcg-target.c
index bdab71d..086c52e 100644
--- a/tcg/ppc/tcg-target.c
+++ b/tcg/ppc/tcg-target.c
@@ -112,7 +112,6 @@ static const int tcg_target_reg_alloc_order[] = {
 #ifndef __linux__
     TCG_REG_R13,
 #endif
-    TCG_REG_R0,
     TCG_REG_R1,
     TCG_REG_R2,
     TCG_REG_R24,
diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
index fc8beba..952d757 100644
--- a/tcg/ppc64/tcg-target.c
+++ b/tcg/ppc64/tcg-target.c
@@ -105,7 +105,6 @@ static const int tcg_target_reg_alloc_order[] = {
     TCG_REG_R11,
     TCG_REG_R12,
     TCG_REG_R13,
-    TCG_REG_R0,
     TCG_REG_R1,
     TCG_REG_R2,
     TCG_REG_R24,
-- 
1.6.0.5